Patents by Inventor Patrick Ossmann

Patrick Ossmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10998915
    Abstract: A digital-to-analog converter circuit including one or more digital-to-analog converter cells and a separate voltage protection circuit connected by a common output node. A first digital-to-analog converter cell includes a first transistor which is configured to be switched to a conductive state when the first digital-to-analog converter cell is activated. A first terminal of the first transistor is coupled to a defined potential, wherein a second terminal of the first transistor is coupled to a common output node of the one or more digital-to-analog converter cells. The digital-to-analog converter circuit further includes a voltage protection circuit coupled between the common output node of the one or more digital-to-analog converter cells and an output node of the digital-to-analog converter circuit to regulate a voltage between the common output node and the defined potential.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: May 4, 2021
    Assignee: Intel IP Corporation
    Inventors: Jose Pedro Diogo Faisca Moreira, Joerg Fuhrmann, Patrick Ossmann, Harald Pretl
  • Publication number: 20200343903
    Abstract: A digital-to-analog converter circuit is provided. The digital-to-analog converter circuit includes one or more digital-to-analog converter cells. A first digital-to-analog converter cell includes a first transistor which is configured to be switched to a conductive state when the first digital-to-analog converter cell is activated. A first terminal of the first transistor is coupled to a defined potential, wherein a second terminal of the first transistor is coupled to a common output node of the one or more digital-to-analog converter cells. The digital-to-analog converter circuit further includes a voltage protection circuit coupled between the common output node of the one or more digital-to-analog converter cells and an output node of the digital-to-analog converter circuit to regulate a voltage between the common output node and the defined potential.
    Type: Application
    Filed: September 2, 2016
    Publication date: October 29, 2020
    Inventors: Jose Pedro Diogo Faisca MOREIRA, Joerg FUHRMANN, Patrick OSSMANN, Harald Pretl
  • Patent number: 9054921
    Abstract: A method and an apparatus provide a plurality of modulated signals by frequency shifting an output signal of a carrier signal generation circuit for obtaining a first carrier signal and a second carrier signal, and by modulating the first and second carrier signals.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: June 9, 2015
    Assignee: Intel Mobile Communications GmbH
    Inventors: Christian Mayer, Harald Pretl, Patrick Ossmann, Jan Zaleski, Krzysztof Dufrene
  • Patent number: 8867665
    Abstract: A communication system includes a first DAC array, a second DAC array, and a merge component. The first DAC array is configured to receive a first portion of modulation signals and to generate a first RF signal according to a modulation mode. The second DAC array is configured to receive a second portion of the modulation signals and to generate a second RF signal according to the modulation mode. The merge component is configured to receive the first RF signal and the second RF signal. The merge component is also configured to generate an output RF signal according to the first RF signal and the second RF signal, wherein the output RF signal has a modulation format according to the modulation mode.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: October 21, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Krzysztof Dufrene, Harald Pretl, Patrick Ossmann, Jan Zaleski, Christian Mayer
  • Publication number: 20140269993
    Abstract: A method and an apparatus provide a plurality of modulated signals by frequency shifting an output signal of a carrier signal generation circuit for obtaining a first carrier signal and a second carrier signal, and by modulating the first and second carrier signals.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: Christian Mayer, Harald Pretl, Patrick Ossmann, Jan Zaleski, Krzysztof Dufrene
  • Patent number: 8803720
    Abstract: An RF-DAC cell is configured to generate an RF output signal based on a baseband signal, a first signal and a second signal. The first signal has a first duty cycle and toggles between first predefined amplitude values, and the second signal has a second duty cycle smaller than the first duty cycle and toggles between second predefined amplitude values.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: August 12, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Krzysztof Dufrene, Harald Pretl, Patrick Ossmann
  • Publication number: 20140211870
    Abstract: A communication system includes a first DAC array, a second DAC array, and a merge component. The first DAC array is configured to receive a first portion of modulation signals and to generate a first RF signal according to a modulation mode. The second DAC array is configured to receive a second portion of the modulation signals and to generate a second RF signal according to the modulation mode. The merge component is configured to receive the first RF signal and the second RF signal. The merge component is also configured to generate an output RF signal according to the first RF signal and the second RF signal, wherein the output RF signal has a modulation format according to the modulation mode.
    Type: Application
    Filed: January 31, 2013
    Publication date: July 31, 2014
    Inventors: Krzysztof Dufrene, Harald Pretl, Patrick Ossmann, Jan Zaleski, Christian Mayer
  • Patent number: 8781414
    Abstract: An envelope detector includes an input receiving a digital input signal indicative of a magnitude of a signal to be amplified by a power amplifier. A circuit is provided for generating an analog envelope signal based on the digital input signal. The envelope detector includes an output for outputting the analog envelope signal.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: July 15, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Krzysztof Dufrene, Harald Pretl, Patrick Ossmann
  • Publication number: 20140162576
    Abstract: An envelope detector includes an input receiving a digital input signal indicative of a magnitude of a signal to be amplified by a power amplifier. A circuit is provided for generating an analog envelope signal based on the digital input signal. The envelope detector includes an output for outputting the analog envelope signal.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 12, 2014
    Inventors: Krzysztof Dufrene, Harald Pretl, Patrick Ossmann
  • Publication number: 20140159933
    Abstract: An RF-DAC cell is configured to generate an RF output signal based on a baseband signal, a first signal and a second signal. The first signal has a first duty cycle and toggles between first predefined amplitude values, and the second signal has a second duty cycle smaller than the first duty cycle and toggles between second predefined amplitude values.
    Type: Application
    Filed: December 12, 2012
    Publication date: June 12, 2014
    Inventors: Krzysztof Dufrene, Harald Pretl, Patrick Ossmann