Patents by Inventor Patrick P. Chan

Patrick P. Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11070486
    Abstract: Methods and apparatus for improving performance of a system including a first computing system are disclosed. In one embodiment, the first computing system receives a request via a network from a client device. The first computing system determines whether a second computing system is available to respond to requests from the first system. The first computing system obtains a response to the request received from the client device based, at least in part, on one or more estimated values maintained by the first computing system according to whether the second computing system is available to respond to requests from the first computing system. The first computing system transmits the response to the client device.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: July 20, 2021
    Assignee: Verizon Media Inc.
    Inventor: Patrick P. Chan
  • Publication number: 20170331760
    Abstract: Methods and apparatus for improving performance of a system including a first computing system are disclosed. In one embodiment, the first computing system receives a request via a network from a client device. The first computing system determines whether a second computing system is available to respond to requests from the first system. The first computing system obtains a response to the request received from the client device based, at least in part, on one or more estimated values maintained by the first computing system according to whether the second computing system is available to respond to requests from the first computing system. The first computing system transmits the response to the client device.
    Type: Application
    Filed: May 11, 2016
    Publication date: November 16, 2017
    Inventor: Patrick P. Chan
  • Patent number: 7039840
    Abstract: Boundary scan cells for driving internal logic and sensing internal logic of integrated circuit use external clocks synchronized with internal functional clocks. Synchronized clocks enable synchronous sampling of internal signals and synchronized of injection signals into a functional portion of the integrated circuit.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: May 2, 2006
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Patrick P. Chan, Michael Zheng
  • Publication number: 20040030973
    Abstract: Boundary scan cells for driving internal logic and sensing internal logic of integrated circuit use external clocks synchronized with internal functional clocks. Synchronized clocks enable synchronous sampling of internal signals and synchronized of injection signals into a functional portion of the integrated circuit.
    Type: Application
    Filed: April 9, 2003
    Publication date: February 12, 2004
    Inventors: Patrick P. Chan, Michael Zheng
  • Publication number: 20040002832
    Abstract: Serial interfaces on integrated circuits are tested in near-real-time by boundary scan cells. Serial inputs are converted to logic states that are sampled concurrently by a test access port. Test access port data is serialized and driven in near-real-time outward from the integrated circuit.
    Type: Application
    Filed: April 9, 2003
    Publication date: January 1, 2004
    Inventor: Patrick P. Chan
  • Patent number: 6668347
    Abstract: An integrated circuit having a central built-in self-test unit (BIST) that uses internal scan chains for testing embedded memory modules. The embedded memory modules receive address and data signals from a set of input flip-flops configured to form a scan chain. The BIST is coupled to an input scan chain and includes a pattern generator to shift a test pattern into the input scan chain for testing the embedded memory modules. Output flip-flops capture data from the embedded memory modules are also configured as a scan chain. The BIST includes address control logic to bypass the normal addressing logic of the embedded memory module when the BIST operates is operating in a memory test mode.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: December 23, 2003
    Assignee: Intel Corporation
    Inventors: Anthony Babella, Patrick P. Chan, Chih-Jen (Mike) Lin, Thomas J. Shewchuk, Daniel S. Lee
  • Patent number: 5713018
    Abstract: A distributed computer system has an information server and a plurality of client computers coupled by one or more communication paths to the information server. The information server includes a database management system (DBMS) with an interface procedure for receiving and responding to SQL statements from client computers. At least one client computer has a database access procedure for sending SQL statements to the DBMS in the information server. The database access procedure includes embedded encrypted SQL statements, representing a predefined subset of a predefined full set of SQL statements recognized as legal SQL statements by the DBMS. For instance, the predefined subset of SQL statement might include only SQL statements for reading data in the DBMS, but not include SQL statements for modifying and adding data to the DBMS. Each of the SQL statements sent by the database access procedure to the DBMS includes a corresponding one of the encrypted SQL statements.
    Type: Grant
    Filed: September 27, 1995
    Date of Patent: January 27, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Patrick P. Chan
  • Patent number: 5706515
    Abstract: In a computer system having a data processing unit, memory, and a multitasking operating system that supports multiple threads of execution in a shared address space, a resource allocation subsystem includes an initialization procedure for initializing monitors, a notify procedure and a wait procedure. Each monitor has an associated event data structure denoting the status of the monitor as Signaled or Unsignaled. Each monitor also stores a waiters value indicating how many threads are waiting on the monitor, a tickets value indicating how many of the threads are to receive notifications, and an epoch counter value. The notify procedure updates any specified monitor to the Signaled status, updates the specified monitor's tickets value to indicate how many waiting threads are to receive notifications, and updates the epoch counter to indicate an epoch value associated with the updating of the specified monitor's status to Signaled.
    Type: Grant
    Filed: March 25, 1996
    Date of Patent: January 6, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: David W. Connelly, Patrick P. Chan