Abstract: The present invention relates to a millimeter or terahertz wave sensor for providing inline inspection, preferably including but not limited to continuous monitoring of objects, for example thin sheet dielectric material.

Abstract: The present invention relates to a millimeter or terahertz wave sensor for providing inline inspection, preferably including but not limited to continuous monitoring of objects, for example thin sheet dielectric material.

Abstract: Provided herein are apparatus and methods for a cascode amplifier topology for millimeter-wave power application. The cascode amplifier can use a neutralized common source stage cascoded with a bootstrapped common gate stage to provide an amplifier topology having enhanced performance, gain, stability and reliability. Additionally, a bootstrap capacitor of the common gate stage can be patterned between the source fingers and the drain fingers of a cascode transistor so as to improve device performance. Operating as an RF power amplifier, a single-stage cascode amplifier using the neutralized common source stage with the bootstrapped common gate stage can provide greater than 15 dB of power gain to signals of the E band.

Abstract: A two-stage, passive, RC polyphase filter for mm-wave quadrature LO generation is presented. The filter features an innovative, symmetrical layout structure, which is more robust to parasitics than the conventional layout. Layout parasitics which become important at mm-wave frequencies are identified and a compensated. Impedance variations and transfer functions are evaluated considering these dominant parasitics. More than 15 dB improvement in image rejection ratio is achieved in comparison with conventional layouts. Using the inventive techniques more than 35 dB of image rejection ratio over a bandwidth of 6 GHz is demonstrated in an outphasing transmitter at 60 GHz in 40 nm CMOS.

Abstract: A two-stage, passive, RC polyphase filter for mm-wave quadrature LO generation is presented. The filter features an innovative, symmetrical layout structure, which is more robust to parasitics than the conventional layout. Layout parasitics which become important at mm-wave frequencies are identified and a compensated. Impedance variations and transfer functions are evaluated considering these dominant parasitics. More than 15 dB improvement in image rejection ratio is achieved in comparison with conventional layouts. Using the inventive techniques more than 35 dB of image rejection ratio over a bandwidth of 6 GHz is demonstrated in an outphasing transmitter at 60 GHz in 40 nm CMOS.

Abstract: A two-stage, passive, RC polyphase filter for mm-wave quadrature LO generation is presented. The filter features an innovative, symmetrical layout structure, which is more robust to parasitics than the conventional layout. Layout parasitics which become important at mm-wave frequencies are identified and a compensated. Impedance variations and transfer functions are evaluated considering these dominant parasitics. More than 15 dB improvement in image rejection ratio is achieved in comparison with conventional layouts. Using the inventive techniques more than 35 dB of image rejection ratio over a bandwidth of 6 GHz is demonstrated in an outphasing transmitter at 60 GHz in 40 nm CMOS.

Abstract: An Extremely High Frequency (EHF) dual-mode PA with a power combiner is designed using 40-nm bulk CMOS technology. One of the unit PAs can be switched off for the low power applications. In the design, circuit level optimization and trade-off are performed to ensure the good performance in both modes. The PA achieves a PSAT of 17.4 dBm with 29.3% PAE in high power mode and a PSAT of 12.6 dBm with 19.6% PAE in low power mode. The reliability measurements are also conducted and a lifetime of 80613 hours is estimated based on a commonly used empirical model. The excellent performance (e.g., highest reported PAE) achieved in this design further confirms the scaling of CMOS technology will continue to benefit the mm-wave transceiver design.

Abstract: A two-stage, passive, RC polyphase filter for mm-wave quadrature LO generation is presented. The filter features an innovative, symmetrical layout structure, which is more robust to parasitics than the conventional layout. Layout parasitics which become important at mm-wave frequencies are identified and a compensated. Impedance variations and transfer functions are evaluated considering these dominant parasitics. More than 15 dB improvement in image rejection ratio is achieved in comparison with conventional layouts. Using the inventive techniques more than 35 dB of image rejection ratio over a bandwidth of 6 GHz is demonstrated in an outphasing transmitter at 60 GHz in 40 nm CMOS.

Abstract: An Extremely High Frequency (EHF) dual-mode PA with a power combiner is designed using 40-nm bulk CMOS technology. One of the unit PAs can be switched off for the low power applications. In the design, circuit level optimization and trade-off are performed to ensure the good performance in both modes. The PA achieves a PSAT of 17.4 dBm with 29.3% PAE in high power mode and a PSAT of 12.6 dBm with 19.6% PAE in low power mode. The reliability measurements are also conducted and a lifetime of 80613 hours is estimated based on a commonly used empirical model. The excellent performance (e.g., highest reported PAE) achieved in this design further confirms the scaling of CMOS technology will continue to benefit the mm-wave transceiver design.

Abstract: One embodiment relates to a power amplifier that includes a switched mode power amplification stage. The power amplification stage has an output configured to provide an amplified output voltage as a function of a drive signal, where the drive signal fluctuates during a first time and is inactive during a second time. The power amplifier also includes impedance compensation circuitry coupled to the output of the power amplification stage. The impedance compensation circuitry can selectively alter an output impedance of the power amplification stage as a function of a control signal that is continuously de-asserted during the first time and continuously asserted during the second time. Other embodiments are also disclosed.

Abstract: One embodiment relates to a power amplifier that includes a switched mode power amplification stage. The power amplification stage has an output configured to provide an amplified output voltage as a function of a drive signal, where the drive signal fluctuates during a first time and is inactive during a second time. The power amplifier also includes impedance compensation circuitry coupled to the output of the power amplification stage. The impedance compensation circuitry can selectively alter an output impedance of the power amplification stage as a function of a control signal that is continuously de-asserted during the first time and continuously asserted during the second time. Other embodiments are also disclosed.