Patents by Inventor Patrick Robert Zippetelli

Patrick Robert Zippetelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit package
    Patent number: 6226187
    Abstract: The bond strength between a semiconductor chip and a metal heat sink in an integrated circuit package can be improved by using an adhesive system comprising two separate layers, one layer exhibiting preferential bonding strength for the chip and the other layer exhibiting preferential bonding strength for the metal heat sink.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: May 1, 2001
    Assignee: International Business Machines Corporation
    Inventors: David Lee Questad, Anne Marie Quinn, George Henry Thiel, Donna Jean Trevitt, Tien Yue Wu, Patrick Robert Zippetelli
  • Integrated circuit package including a heat sink and an adhesive
    Patent number: 6084299
    Abstract: The bond strength between a semiconductor chip and a metal heat sink in an integrated circuit package can be improved by using an adhesive system comprising two separate layers, one layer exhibiting preferential bonding strength for the chip and the other layer exhibiting preferential bonding strength for the metal heat sink.
    Type: Grant
    Filed: November 9, 1995
    Date of Patent: July 4, 2000
    Assignee: International Business Machines Corporation
    Inventors: David Lee Questad, Anne Marie Quinn, George Henry Thiel, Donna Jean Trevitt, Tien Yue Wu, Patrick Robert Zippetelli
  • Dual substrate package assembly having dielectric member engaging contacts at only three locations
    Patent number: 6046911
    Abstract: An electronic package assembly for being electrically connected to a conducting member (e.g., a printed circuit board) wherein the assembly includes a pair of substrates. The first substrate includes opposing circuit patterns, those on one surface being of higher density and thus adapted for having high density electronic devices mounted thereon. This high density pattern is electrically coupled to the lesser density second pattern which is connected to conductors of a second substrate. These conductors are of the lesser density also, and extend through a dielectric member for being coupled to conductors (e.g., copper circuit pads) on the conducting member. These conductors are in contact with the dielectric member at only three locations before the dielectric is connected to the electronic package assembly and the conducting member. Ready separability of various parts of the assembly is thus assured.
    Type: Grant
    Filed: February 19, 1997
    Date of Patent: April 4, 2000
    Assignee: International Business Machines Corporation
    Inventors: David William Dranchak, Robert Joseph Kelleher, David Peter Pagnani, Patrick Robert Zippetelli
  • Dual substrate package assembly coupled to a conducting member
    Patent number: 5953214
    Abstract: An electronic package assembly for being electrically connected to a conducting member (e.g., a printed circuit board) wherein the assembly includes a pair of substrates. The first substrate includes opposing circuit patterns, those on one surface being of higher density and thus adapted for having high density electronic devices mounted thereon. This high density pattern is electrically coupled to the lesser density second pattern which is connected to contacts of a second substrate. These contacts are of the lesser density also, and extend through a dielectric member for being coupled to conductors (e.g., copper circuit pads) on the conducting member. Ready separability of various parts of the assembly is thus assured.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: September 14, 1999
    Assignee: International Business Machines Corporation
    Inventors: David William Dranchak, Robert Joseph Kelleher, David Peter Pagnani, Patrick Robert Zippetelli