Patents by Inventor Patrick Ronald Varekamp

Patrick Ronald Varekamp has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9495498
    Abstract: An apparatus, program product and method facilitate the design of a multi-layer circuit arrangement incorporating a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 15, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
  • Publication number: 20130009324
    Abstract: An apparatus, program product and method facilitate the design of a multi-layer circuit arrangement incorporating a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
  • Patent number: 8330489
    Abstract: A circuit arrangement and method utilize a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: December 11, 2012
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
  • Publication number: 20120198406
    Abstract: An apparatus, program product and method facilitate the design of a multi-layer circuit arrangement incorporating a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.
    Type: Application
    Filed: March 16, 2012
    Publication date: August 2, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
  • Publication number: 20100271071
    Abstract: A circuit arrangement and method utilize a universal, standardized inter-layer interconnect in a multi-layer semiconductor stack to facilitate interconnection and communication between functional units disposed on a stack of semiconductor dies. Each circuit layer in the multi-layer semiconductor stack is required to include an inter-layer interface region that is disposed at substantially the same topographic location such that when the semiconductor dies upon which such circuit layers are disposed are arranged together in a stack, electrical conductors disposed within each semiconductor die are aligned with one another to provide an inter-layer bus that is oriented vertically, or transversely, with respect to the individual circuit layers.
    Type: Application
    Filed: April 28, 2009
    Publication date: October 28, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gerald K. Bartley, Russell Dean Hoover, Charles Luther Johnson, Steven Paul VanderWiel, Patrick Ronald Varekamp
  • Patent number: 6756646
    Abstract: A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains. nitrogen and/or oxygen at a temperature of not less than 500° C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH2Cl2, C2H3Cl3, C2H2Cl2. CH3Cl and CHCl3.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: June 29, 2004
    Assignee: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Patrick Ronald Varekamp
  • Publication number: 20030203653
    Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.
    Type: Application
    Filed: May 2, 2003
    Publication date: October 30, 2003
    Applicant: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
  • Publication number: 20030190821
    Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.
    Type: Application
    Filed: May 2, 2003
    Publication date: October 9, 2003
    Applicant: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
  • Publication number: 20030190780
    Abstract: A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains nitrogen and/or oxygen at a temperature of not less than 500° C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH2Cl2, C2H3Cl3, C2H2Cl2. CH3Cl and CHCl3.
    Type: Application
    Filed: May 22, 2001
    Publication date: October 9, 2003
    Applicant: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Patrick Ronald Varekamp
  • Patent number: 6566281
    Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.
    Type: Grant
    Filed: December 1, 1997
    Date of Patent: May 20, 2003
    Assignee: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
  • Patent number: 6245616
    Abstract: A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains nitrogen and/or oxygen at a temperature of not less than 500° C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH2Cl2, C2H3Cl3, C2H2Cl2, CH3Cl and CHCl3.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: June 12, 2001
    Assignee: International Business Machines Corporation
    Inventors: Douglas Andrew Buchanan, Matthew Warren Copel, Patrick Ronald Varekamp