Patents by Inventor Patrick Scheer

Patrick Scheer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180097014
    Abstract: An electronic chip includes FDSOI-type field-effect transistors. The transistor each have a channel region that is doped at an average level in a range from 1016 to 5*1017 atoms/cm3 with a conductivity type opposite to that of a conductivity type for the dopant in the drain and source regions.
    Type: Application
    Filed: October 2, 2017
    Publication date: April 5, 2018
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Vincent Barral, Nicolas Planes, Antoine Cros, Sebastien Haendler, Thierry Poiroux, Olivier Weber, Patrick Scheer
  • Patent number: 9000785
    Abstract: A test structure may characterize the properties of a transistor including a DC test structure for testing DC properties of the transistor, and an AC test structure for testing AC properties of the transistor. The DC and AC test structures may have common test pads.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: April 7, 2015
    Assignee: STMicroelectronics SA
    Inventors: Clement Charbuillet, Patrick Scheer
  • Publication number: 20130027066
    Abstract: A test structure may characterize the properties of a transistor including a DC test structure for testing DC properties of the transistor, and an AC test structure for testing AC properties of the transistor. The DC and AC test structures may have common test pads.
    Type: Application
    Filed: July 25, 2012
    Publication date: January 31, 2013
    Applicant: STMicroelectronics SA
    Inventors: Clement Charbuillet, Patrick Scheer