Patents by Inventor Patrick T. Chin

Patrick T. Chin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6680497
    Abstract: A heterojunction bipolar transistor is doped in the sub-collector layer (20) with phosphorus (24). The presence of the phosphorus causes any interstitial gallium (22) to be bonded (26) to the phosphorus (24) and move to a lattice site. The result is that the interstitial gallium does not diffuse to the base layer and thus does not cause the beryllium to be displaced and diffused. Instead of doping with phosphorus, a layer including phosphorus can also be utilized.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: January 20, 2004
    Assignee: TRW Inc.
    Inventors: Patrick T. Chin, Augusto L. Gutierrez-Aitken, Eric N. Kaneshiro
  • Patent number: 6408860
    Abstract: A method for cleaning phosphorus from a MBE vacuum chamber by freezing the panel (22) placed within the vacuum chamber (10) onto which excess phosphorus is deposited. The panel is connected to a source of cold nitrogen (24) which cools the panel. Water is introduced after the panels are cooled so as to form a layer of ice on top of the phosphorus. The panel may then be removed for cleaning with ice covering the phosphorus without danger of ignition of the phosphorus.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: June 25, 2002
    Assignee: TRW Inc.
    Inventors: Patrick T. Chin, Todd K. Makishi, Thomas R. Block
  • Patent number: 6376867
    Abstract: The performance of a heterojunction bipolar transistor (HBT) operating at high power is limited by the power that can be dissipated by the device. This, in turn, is limited by the thermal resistance of the device to heat dissipation. In a typical HBT, and especially InP-based HBTs, heat generated during operation is concentrated near the collector-base junction. In order to more efficiently dissipate heat downward through the device to the substrate, both the collector and the sub-collector are formed of InP, which has a substantially lower thermal resistance than other typically used semiconductor materials.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: April 23, 2002
    Assignee: TRW Inc.
    Inventors: Augusto L. Gutierrez-Aitken, Aaron K. Oki, Patrick T. Chin, Dwight C. Streit