Patents by Inventor Patrick Waltereit

Patrick Waltereit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190206713
    Abstract: A method for producing a semiconductor device is provided. A growth substrate having a first side and an opposite second side is provided. At least one electronic component is produced by depositing and/or structuring at least one layer on the first side of the growth substrate, said layer containing or consisting of at least one compound semiconductor. The first side of the electronic component that is opposite the first side of the growth substrate is connected to a support. The growth substrate is removed. The support has at least one feed-through and/or at least one conductor track, which is connected to at least one terminal contact of the electronic component. Alternatively or in addition, a semiconductor device produced in this way and a support having such a semiconductor device may be provided.
    Type: Application
    Filed: December 18, 2018
    Publication date: July 4, 2019
    Applicant: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.
    Inventors: Richard Reiner, Thomas Gerrer, Dirk Meder, Beatrix Weiss, Patrick Waltereit
  • Patent number: 8987011
    Abstract: A method for determining the structure of a transistor having at least one first layer including GaN, one second layer including AlxGa1-xN disposed on the first layer, and one fourth layer including a metal or an alloy disposed on the second layer. The method includes setting the layer thickness of the second layer, setting the aluminum content x of the second layer, producing at least the second layer and the first layer, determining the surface potential of formula (I) and/or the charge carrier density n, and/or the charge carrier motility ? after producing the second layer and the first layer, and selecting the material of the fourth layer as a function of the at least one measurement result.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: March 24, 2015
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventors: Klaus Köhler, Stefan Müller, Patrick Waltereit
  • Publication number: 20120161150
    Abstract: A method for determining the structure of a transistor having at least one first layer including GaN, one second layer including AlxGa1-xN disposed on the first layer, and one fourth layer including a metal or an alloy disposed on the second layer. The method includes setting the layer thickness of the second layer, setting the aluminum content x of the second layer, producing at least the second layer and the first layer, determining the surface potential of formula (I) and/or the charge carrier density n, and/or the charge carrier motility ? after producing the second layer and the first layer, and selecting the material of the fourth layer as a function of the at least one measurement result.
    Type: Application
    Filed: August 18, 2010
    Publication date: June 28, 2012
    Inventors: Klaus Köhler, Stefan Müller, Patrick Waltereit