Abstract: A system for displaying a map to passengers on a commercial passenger vehicle is disclosed. The system comprises a storage configured to store (1) personal information of passengers either located in or expected to board the commercial passenger vehicle; and (2) location-related information including location-related information associated with an area covered by the map; a server located in the commercial passenger vehicle and configured to perform a method comprising: sending, to a media playback device associated with a passenger, a message to display a list of selectable map features; receiving, from the media playback device, a selection of at least one map feature among the selectable map features; retrieving the personal information or the location-related information from the storage; and integrating retrieved personal information or retrieved location-related information to map data, thereby rendering the map.

Abstract: A system for displaying a map to passengers on a commercial passenger vehicle is disclosed. The system comprises a storage configured to store (1) personal information of passengers either located in or expected to board the commercial passenger vehicle; and (2) location-related information including location-related information associated with an area covered by the map; a server located in the commercial passenger vehicle and configured to perform a method comprising: sending, to a media playback device associated with a passenger, a message to display a list of selectable map features; receiving, from the media playback device, a selection of at least one map feature among the selectable map features; retrieving the personal information or the location-related information from the storage; and integrating retrieved personal information or retrieved location-related information to map data, thereby rendering the map.

Abstract: There is provided mechanisms for scheduling a task from a plurality of tasks to a processor core of a cluster of processor cores. The processor cores share caches. A method is performed by a controller. The method comprises determining group-wise task relationships between the plurality of tasks based on duration of cache misses resulting from running groups of the plurality of tasks on processor cores sharing the same cache. The method comprises scheduling the task to one of the processor cores based on the group-wise task relationships of the task.

Abstract: A method of a priority trainer of a many core processing system comprising a plurality of cores is disclosed.

Abstract: A multi-processor system comprises a sending processor adapted to send a data message, a receiving processor adapted to receive the date message, and a memory unit associated with the receiving processor. The multi-processor system has a size-index table associated with the sending processor, and the sending processor is adapted to map a size of a payload portion of the data message to an index of the size-index table, and to send the data message containing the size, the index and the payload portion to the receiving processor. The multi-processor system also has mapping circuitry associated with the receiving processor. The mapping circuitry is adapted to the map the index contained in the data message received from the sending processor to a pointer, wherein the pointer is associated with a buffer of the memory unit. The receiving processor is adapted to write the payload portion of the received data message to the buffer as indicated by the pointer.

Abstract: A method for determining the size of each of a predetermined number of memory frames to be allocated for storing data blocks in a memory, and a processing device for implementing the method. The method comprises determining a data block size distribution for at least one set of data blocks. A data block size of the data block size distribution is eliminated iteratively until the number of data block sizes corresponds to the number of sizes of the memory frames. The data block sizes to merge are selected by means of a slack prediction algorithm. The sizes of the memory frames are determined as the data block sizes of the distribution which remain after the elimination.