Patents by Inventor Pattabi M. Seshadri

Pattabi M. Seshadri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8091073
    Abstract: A method, system, and computer program product are provided for identifying instructions to obtain representative traces. A phase instruction budget is calculated for each phase in a set of phases. The phase instruction budget is based on a weight associated with each phase and a global instruction budget. A starting index and an ending index are identified for instructions within a set of intervals in each phase in order to meet the phase instruction budget for that phase, thereby forming a set of interval indices. A determination is made as to whether the instructions within the set of interval indices meet the global instruction budget. Responsive to the global instruction budget being met, the set of interval indices are output as collection points for the representative traces.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: January 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Bell, Jr., Wen-Tzer T. Chen, Richard J. Eickemeyer, Venkat R. Indukuru, Pattabi M. Seshadri, Madhavi G. Valluri
  • Patent number: 8010334
    Abstract: A test system or simulator includes an integrated circuit (IC) benchmark software program that executes workload program software on a semiconductor die IC design model. The benchmark software program includes trace, simulation point, basic block vector (BBV) generation, cycles per instruction (CPI) error, clustering and other programs. The test system also includes CPI stack program software that generates CPI stack data that includes microarchitecture dependent information for each instruction interval of workload program software. The CPI stack data may also include an overall analysis of CPI data for the entire workload program. IC designers may utilize the benchmark software and CPI stack program to develop a reduced representative workload program that includes CPI data as well as microarchitecture dependent information.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: August 30, 2011
    Assignee: International Business Machines Corporation
    Inventors: Robert H Bell, Thomas W Chen, Jr., Venkat R Indukuru, Alex E Mericas, Pattabi M Seshadri, Madhavi G Valluri
  • Patent number: 7844928
    Abstract: A test system or simulator includes an IC benchmark software program that executes application software on a semiconductor die IC design model. The benchmark software includes trace, simulation point, clustering and other programs. IC designers utilize the benchmark software to evaluate the performance characteristics of IC designs with customer user software applications. The benchmark software generates basic block vectors BBVs from instruction traces of application software. The benchmark software analyzes data dependent information that it appends to BBVs to create enhanced BBVs or EBBVs. The benchmark software may graph the EBBV information in a cluster diagram and selects a subset of EBBVs as a representative sample for each program phase. Benchmarking software generates a reduced application software program from the representative EBBV samples.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Bell, Thomas W. Chen, Richard J. Eickemeyer, Venkat R. Indukuru, Pattabi M. Seshadri, Madhavi G. Valluri
  • Patent number: 7770140
    Abstract: A test system or simulator includes an IC test application sampling software program that executes test application software on a semiconductor die IC design model. The test application sampling software includes trace, simulation point, CPI error, clustering and other programs. IC designers utilize the test application sampling software to evaluate the performance characteristics of IC designs with test software applications. The test application sampling software generates basic block vectors (BBVs) and fly-by vectors (FBVs) from instruction trace analysis of test application software. The test application sampling software analyzes microarchitecture dependent information that it uses to generate the FBVs. Test application sampling software generates a reduced representative test application software program from the BBV and FBV data utilizing an instruction budgeting method.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: August 3, 2010
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Bell, Thomas W. Chen, Venkat R. Indukuru, Pattabi M. Seshadri, Madhavi G. Valluri
  • Publication number: 20090276191
    Abstract: A test system or simulator includes an enhanced IC test application sampling software program that executes test application software on a semiconductor die IC design model. The enhanced test application sampling software may include trace, simulation point, CPI error, clustering, instruction budgeting, and other programs. The enhanced test application sampling software generates basic block vectors (BBVs) and fly-by vectors (FBVs) from instruction trace analysis of test application software workloads. The enhanced test application sampling software utilizes the microarchitecture dependent information to generate the FBVs to select representative instruction intervals from the test application software. The enhanced test application sampling software generates a reduced representative test application software program from the BBV and FBV data utilizing a global instruction budgeting analysis method.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 5, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert H. Bell, JR., Wen-Tzer Thomas Chen, Venkat R. Indukuru, Pattabi M. Seshadri, Madhavi G. Valluri
  • Publication number: 20090276190
    Abstract: A test system or simulator includes an integrated circuit (IC) benchmark software program that executes workload program software on a semiconductor die IC design model. The benchmark software program includes trace, simulation point, basic block vector (BBV) generation, cycles per instruction (CPI) error, clustering and other programs. The test system also includes CPI stack program software that generates CPI stack data that includes microarchitecture dependent information for each instruction interval of workload program software. The CPI stack data may also include an overall analysis of CPI data for the entire workload program. IC designers may utilize the benchmark software and CPI stack program to develop a reduced representative workload program that includes CPI data as well as microarchitecture dependent information.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 5, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Robert H. Bell, JR., Thomas W. Chen, Venkat R. Indukuru, Alexander E. Mericas, Pattabi M. Seshadri, Madhavi G. Valluri
  • Publication number: 20090199138
    Abstract: A test system or simulator includes an IC test application sampling software program that executes test application software on a semiconductor die IC design model. The test application sampling software includes trace, simulation point, CPI error, clustering and other programs. IC designers utilize the test application sampling software to evaluate the performance characteristics of IC designs with test software applications. The test application sampling software generates basic block vectors (BBVs) and fly-by vectors (FBVs) from instruction trace analysis of test application software. The test application sampling software analyzes microarchitecture dependent information that it uses to generate the FBVs. Test application sampling software generates a reduced representative test application software program from the BBV and FBV data utilizing an instruction budgeting method.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 6, 2009
    Applicant: IBM Corporation
    Inventors: Robert H. Bell, Thomas W. Chen, Venkat R. Indukuru, Pattabi M. Seshadri, Madhavi G. Valluri
  • Publication number: 20090183127
    Abstract: A test system or simulator includes an IC benchmark software program that executes application software on a semiconductor die IC design model. The benchmark software includes trace, simulation point, clustering and other programs. IC designers utilize the benchmark software to evaluate the performance characteristics of IC designs with customer user software applications. The benchmark software generates basic block vectors BBVs from instruction traces of application software. The benchmark software analyzes data dependent information that it appends to BBVs to create enhanced BBVs or EBBVs. The benchmark software may graph the EBBV information in a cluster diagram and selects a subset of EBBVs as a representative sample for each program phase. Benchmarking software generates a reduced application software program from the representative EBBV samples.
    Type: Application
    Filed: January 11, 2008
    Publication date: July 16, 2009
    Applicant: IBM Corporation
    Inventors: Robert H. Bell, Thomas W. Chen, Richard J. Eickemeyer, Venkat R. Indukuru, Pattabi M. Seshadri, Madhavi G. Valluri
  • Publication number: 20080307203
    Abstract: A method, system, and computer program product are provided for identifying instructions to obtain representative traces. A phase instruction budget is calculated for each phase in a set of phases. The phase instruction budget is based on a weight associated with each phase and a global instruction budget. A starting index and an ending index are identified for instructions within a set of intervals in each phase in order to meet the phase instruction budget for that phase, thereby forming a set of interval indices. A determination is made as to whether the instructions within the set of interval indices meet the global instruction budget. Responsive to the global instruction budget being met, the set of interval indices are output as collection points for the representative traces.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 11, 2008
    Inventors: Robert H. Bell, JR., Wen-Tzer T. Chen, Richard J. Eickemeyer, Venkat R. Indukuru, Pattabi M. Seshadri, Madhavi G. Valluri