Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: A plasma power limiter fabricated using wafer-level fabrication techniques with other circuit elements. The plasma limiter includes a signal substrate and a trigger substrate defining a hermetically sealed cavity therebetween in which is encapsulated an ionizable gas. The signal substrate includes a signal line within the cavity and the trigger substrate includes at least one trigger probe extending from the trigger substrate towards the transmission line. If a signal propagating on the transmission line exceeds a power threshold, the gas within the cavity is ionized creating a conduction path between the transmission line and the trigger probe that draws off the high power current.

Abstract: A method and apparatus for integrating individual III-V MMICs into a micromachined waveguide package is disclosed. MMICs are screened prior to integration, allowing only known-good die to be integrated, leading to increased yield. The method and apparatus are used to implement a micro-integrated Focal Plane Array (mFPA) technology used for sub millimeter wave (SMMW) cameras, although many other applications are possible. MMICs of different technologies may be integrated into the same micromachined package thus achieving the same level of technology integration as in multi-wafer WLP integration.

Abstract: A wafer-scale assembly circuit including a plurality of metal interconnect layers, where each metal layer includes patterned metal portions and where at least some of the patterned metal portions are RF signal lines. The circuit further includes at least one benzocyclobutene layer provided between two metal interconnect layers that includes at least one trench via formed around a perimeter of the benzocyclobutene layer at a circuit sealing ring, where the trench via provides a hermetic seal at the sealing ring. The benzocyclobutene layer also includes a plurality of stabilizing post vias formed through the benzocyclobutene layer adjacent to the trench via proximate to the sealing ring and extending around the perimeter of the benzocyclobutene layer, where the stabilizing vias operate to prevent the benzocyclobutene layer from shrinking in size.

Abstract: An integrated packaging assembly for an MMIC that uses the semiconductor wafers on which circuit elements are fabricated as the package. The packaging assembly includes a plurality of semiconductor layers that have been diced from the semiconductor wafers, where the semiconductor layers can be made of different semiconductor material. The semiconductor layers define cavities therebetween in which circuit components are fabricated. A sealing ring seals the semiconductor layers together so as to hermetically seal the circuit components within the cavities.

Abstract: A wafer circuit, such as a wafer-level package, that includes a semiconductor substrate on which is fabricated one or more integrated circuits. A backside metal layer is deposited on the semiconductor substrate, and is electrically coupled to the integrated circuit by metallized vias extending through the substrate wafer. The backside metal layer is cut to provide electrically isolated backside metal layers for RF, DC and/or ground signals. An adhesion layer is deposited on the backside of the substrate before the metal layer is deposited so that the metal layer is firmly secured to the substrate, and resists peeling. The adhesion layer can be sputtered silicon, sputtered silicon nitride, silicon nitride deposited by chemical vapor deposition, nickel deposited by evaporation and nickel chromium deposited by evaporation.

Abstract: A reconfigurable circuit and a related method for its use, the circuit including multiple microelectromechanical systems (MEMS) switches connected between selected points in the circuit. The MEMS switches are controlled to select a desired circuit condition, such as an impedance matching condition, and then the switch conditions may be fused permanently. In the context of an impedance matching circuit, the MEMS switches may be used to optimize matching after circuit fabrication or after packaging, thereby allowing optimization even after potentially performance changing events.

Abstract: An integrated packaging assembly for an MMIC that uses the semiconductor wafers on which circuit elements are fabricated as the package. The packaging assembly includes a plurality of semiconductor layers that have been diced from the semiconductor wafers, where the semiconductor layers can be made of different semiconductor material. The semiconductor layers define cavities therebetween in which circuit components are fabricated. A sealing ring seals the semiconductor layers together so as to hermetically seal the circuit components within the cavities.

Abstract: A reconfigurable circuit and a related method for its use, the circuit including multiple microelectromechanical systems (MEMS) switches connected between selected points in the circuit. The MEMS switches are controlled to select a desired circuit condition, such as an impedance matching condition, and then the switch conditions may be fused permanently. In the context of an impedance matching circuit, the MEMS switches may be used to optimize matching after circuit fabrication or after packaging, thereby allowing optimization even after potentially performance changing events.