Abstract: A trace unit is provided which is configured to generate items of trace data indicative of processing activities, of a data processing unit. The trace unit comprises a trace indexing unit configured to associate an index value with at least a subset of the items of trace data generated by the trace unit. The trace indexing unit is configured to generate each index value as one of a predetermined sequence of index values, wherein an n+1th index value in the predetermined sequence can be determined from only an nth index value in the predetermined sequence.

Abstract: A trace unit is provided which is configured to generate items of trace data indicative of processing activities, of a data processing unit. The trace unit comprises a trace indexing unit configured to associate an index value with at least a subset of the items of trace data generated by the trace unit. The trace indexing unit is configured to generate each index value as one of a predetermined sequence of index values, wherein an n+1th index value in the predetermined sequence can be determined from only an nth index value in the predetermined sequence.

Abstract: The present invention provides a data processing apparatus and method for determining a target address for an instruction flow changing instruction. The data processing apparatus comprises a processor operable to execute a stream of instructions, and a prefetch unit operable to prefetch instructions from a memory prior to sending those instructions to the processor for execution. The prefetch unit is operable to receive from the memory simultaneously a plurality of prefetched instructions from sequential addresses in memory, and is operable to detect whether any of those prefetched instructions are an instruction flow changing instruction, and based thereon to output a fetch address for a next instruction to be prefetched by the prefetch unit. Address generation logic is also provided which is operable, for a selected prefetched instruction that is detected to be an instruction flow changing instruction, to determine a target address to be output as the fetch address.

Abstract: The present invention provides a data processing apparatus and method for predicting the execution of an instruction flow changing instruction. The data processing apparatus has a processor operable to execute instructions, and a prefetch unit operable to prefetch instructions from a memory prior to sending those instructions to the processor for execution. The prefetch unit is operable to determine for a prefetched instruction whether that prefetched instruction is an instruction flow changing instruction, and based thereon to determine a fetch address for a next instruction to be prefetched by the prefetch unit. A return stack is also provided which is accessible by the prefetch unit and operable to hold one or more addresses.