Patents by Inventor Paul A. Stiling

Paul A. Stiling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5444716
    Abstract: A system (10) for testing one or more circuit boards (12.sub.1 -12.sub.n), each containing at least one chain of Boundary-Scan cells (14.sub.1 -14.sub.p), includes a system test and diagnosis host (16) for managing overall testing of the system formed by the circuit boards. A Boundary-Scan Virtual Machine (BVM) (17) is operative to receive an initiate test command from the system test and diagnosis host independent of the number and nature of the boards to be tested. In response to the test command, the BVM (17) causes each circuit board to execute a test program (23) specific thereto to determine the errors, if any, in the board. The errors from each board are passed back to the BVM (17) which, in turn, interprets the errors to yield test information, indicative of the operation of the boards, which is then passed back to the system test and diagnosis host (16).
    Type: Grant
    Filed: August 30, 1993
    Date of Patent: August 22, 1995
    Assignee: AT&T Corp.
    Inventors: Najmi T. Jarwala, Paul A. Stiling, Enn Tammaru, Chi W. Yau