Abstract: Systems and methods are provided for interconnecting proxy directories, through core proxy services. One example computer-implemented method includes receiving, by a first proxy service core computing device, from a participant, a proxy lookup request, where the proxy lookup request includes a proxy and based on one or more routing rules, submitting the proxy lookup request to a second proxy service core computing device. The method also includes receiving, by the first proxy service core computing device, from the second proxy service core computing device, a proxy lookup response, which includes account data linked to the proxy, and returning the proxy lookup response, to the participant, in response to the proxy lookup request.

Abstract: Systems and methods are provided for deploying keys in connection with proxy resolution. One example computer-implemented method includes distributing, by a service core computing device, a root certificate signed by a certificate authority and an intermediate certificate, which is signed by a root private key associated with the root certificate, and receiving, from a participant, a signing request for a participant certificate including a participant public key. The method also includes assessing, by the service core computing device, the signing request for the participant certificate and signing, by the service core computing device, the participant certificate with an intermediate public key included in the intermediate certificate. The method then includes disseminating the signed participant certificate to the participant and another participant, whereby the participants on the participant certificate based on the participant certificate being signed by the intermediate public key.

Abstract: Disclosed herein are methods for determining whether a PAR4 inhibitor should be administered to a human subject, the methods comprising administering a PAR4 inhibitor to a subject determined to have a “G” allele for a single-nucleotide polymorphism (SNP) at rs773902, and not administering a PAR4 inhibitor to a subject determined to have an “A” allele for the SNP at rs773902. A genotyping assay can be used to determine the SNP.

Abstract: Disclosed herein are methods for determining whether a PAR4 inhibitor should be administered to a human subject, the methods comprising administering a PAR4 inhibitor to a subject determined to have a “G” allele for a single-nucleotide polymorphism (SNP) at rs773902, and not administering a PAR4 inhibitor to a subject determined to have an “A” allele for the SNP at rs773902. A genotyping assay can be used to determine the SNP.

Abstract: Analog-to-digital converters (ADCs) can have errors which can affect their performance. To improve the performance, many techniques have been used to compensate or correct for the errors. When the ADCs are being implemented with sub-micron technology, ADCs can be readily and easily equipped with an on-chip microprocessor for performing a variety of digital functions. The on-chip microprocessor and any suitable digital circuitry can implement functions for reducing those errors, enabling certain undesirable artifacts to be reduced, and providing a flexible platform for a highly configurable ADC. The on-chip microprocessor is particularly useful for a randomized time-interleaved ADC. Moreover, a randomly sampling ADC can be added in parallel to a main ADC for calibration purposes. Furthermore, the overall system can include an efficient implementation for correcting errors in an ADC.

Abstract: Disclosed herein are methods for determining whether a PAR4 inhibitor should be administered to a human subject, the methods comprising administering a PAR4 inhibitor to a subject determined to have a “G” allele for a single-nucleotide polymorphism (SNP) at rs773902, and not administering a PAR4 inhibitor to a subject determined to have an “A” allele for the SNP at rs773902. A genotyping assay can be used to determine the SNP.

Abstract: Analog-to-digital converters (ADCs) can have errors which can affect their performance. To improve the performance, many techniques have been used to compensate or correct for the errors. When the ADCs are being implemented with sub-micron technology, ADCs can be readily and easily equipped with an on-chip microprocessor for performing a variety of digital functions. The on-chip microprocessor and any suitable digital circuitry can implement functions for reducing those errors, enabling certain undesirable artifacts to be reduced, and providing a flexible platform for a highly configurable ADC. The on-chip microprocessor is particularly useful for a randomized time-interleaved ADC. Moreover, a randomly sampling ADC can be added in parallel to a main ADC for calibration purposes. Furthermore, the overall system can include an efficient implementation for correcting errors in an ADC.

Abstract: Analog-to-digital converters (ADCs) can have errors which can affect their performance. To improve the performance, many techniques have been used to compensate or correct for the errors. When the ADCs are being implemented with sub-micron technology, ADCs can be readily and easily equipped with an on-chip microprocessor for performing a variety of digital functions. The on-chip microprocessor and any suitable digital circuitry can implement functions for reducing those errors, enabling certain undesirable artifacts to be reduced, and providing a flexible platform for a highly configurable ADC. The on-chip microprocessor is particularly useful for a randomized time-interleaved ADC. Moreover, a randomly sampling ADC can be added in parallel to a main ADC for calibration purposes. Furthermore, the overall system can include an efficient implementation for correcting errors in an ADC.

Abstract: Analog-to-digital converters (ADCs) can have errors which can affect their performance. To improve the performance, many techniques have been used to compensate or correct for the errors. When the ADCs are being implemented with sub-micron technology, ADCs can be readily and easily equipped with an on-chip microprocessor for performing a variety of digital functions. The on-chip microprocessor and any suitable digital circuitry can implement functions for reducing those errors, enabling certain undesirable artifacts to be reduced, and providing a flexible platform for a highly configurable ADC. The on-chip microprocessor is particularly useful for a randomized time-interleaved ADC. Moreover, a randomly sampling ADC can be added in parallel to a main ADC for calibration purposes. Furthermore, the overall system can include an efficient implementation for correcting errors in an ADC.

Abstract: An electroless nickel plating bath is provided that utilizes hypophosphite ions as a reducing agent and is substantially free of sulphate and sodium ions. Spent nickel in the plating bath is removed using an ion exchange resin and the remaining effluent solution is usable for manufacturing fertilizer compositions. The nickel is processed for inclusion back into the plating bath. Thus, the process of the invention allows for the indefinite use of the solutions without discharging hazardous waste.

Abstract: An electroless nickel plating bath is provided that utilizes hypophosphite ions as a reducing agent and is substantially free of sulphate and sodium ions. Spent nickel in the plating bath is removed using an ion exchange resin and the remaining effluent solution is usable for manufacturing fertilizer compositions. The nickel is processed for inclusion back into the plating bath. Thus, the process of the invention allows for the indefinite use of the solutions without discharging hazardous waste.