Abstract: An apparatus, a carrier medium carrying computer readable code to implement a method, and a method for searching for a plurality of patterns definable by complex expressions, and further, for efficiently generating data for such searching. One method includes accepting or determining a plurality of state machines for searching for a plurality of patterns, merging the state machines to form a merged state machine, and storing a data structure describing the merged state machine, including state data on the states of the merged state machine. The method is such that pattern matching logic reading state data and accepting a sequence of inputs can search the input sequence for the plurality of patterns.

Abstract: CAM devices that can be cascaded together to form CAM systems of different sizes are disclosed. The system has one or more clusters of M CAM devices, each device including (M?1) disable connections. Disable signals are used to avoid contention so that one CAM device generates the system output on a shared bus. To reduce pin count, the CAM device of priority N within each cluster has (N?1) of its disable connections programmed as inputs for disable-in signals received from higher-priority CAM devices, and its remaining (M?N) disable connections programmed as outputs for disable-out signals provided to lower-priority CAM devices. Some embodiments include two or more clusters of CAM devices and a controller. In some embodiments, the CAM system works as fast as a single CAM device. Some embodiments impose no architectural limits on the number of CAM devices that can be cascaded together.

Abstract: A data distribution system suitable for use in a content addressable memory (CAM) search engine have a number of CAM units. A set of bank multiplexers each includes a set of multiplexing constructs that are controllable via respective bank control buses. Input data for storage in the CAM units as file data or for searching against pre-stored file data are provided to the bank multiplexers and the bank control buses direct the multiplexing constructs to selectively pass sub-portions of the input data onward to the CAM units thus distributing some or all of the input data to the CAM units, with the input data configurably ordered as desired, configurably duplicated as desired, or both. Optionally, a configuration register can hold multiple sets of programming data for loading onto the bank control buses to direct the multiplexing constructs, thus facilitating different distributions of the input data to the CAM units.

Abstract: CAM devices that can be cascaded together to form CAM systems of different sizes are disclosed. The system has one or more clusters of M CAM devices, each device including (M−1) disable connections. Disable signals are used to avoid contention so that one CAM device generates the system output on a shared bus. To reduce pin count, the CAM device of priority N within each cluster has (N−1) of its disable connections programmed as inputs for disable-in signals received from higher-priority CAM devices, and its remaining (M−N) disable connections programmed as outputs for disable-out signals provided to lower-priority CAM devices. Some embodiments include two or more clusters of CAM devices and a controller. In some embodiments, the CAM system works as fast as a single CAM device. Some embodiments impose no architectural limits on the number of CAM devices that can be cascaded together.

Abstract: A parallel search engine able to receive commands via a search instruction input and data words via a search data input. The commands received, which are optionally programmable, control operation of a data dispatch unit and a result dispatch unit. The data words received are sent by the data dispatch unit as search data to a CAM module array made up of CAM modules interconnected by a cascade information bus for comparison against pre-stored comparand databases. The CAM modules of the CAM module array provide search results to the result dispatch unit which generates results, typically multiple in parallel, at a result output. Optionally, multiple of the parallel search engines may be cascaded by connection to an expansion bus to form a mega search engine.

Abstract: A parallel search engine (30) able to receive commands via a search instruction input (44) and data words via a search data input (46). The commands received, which are optionally programmable, control operation of a data dispatch unit (58) and a result dispatch unit (66). The data words received are sent by the data dispatch unit (58) as search data (60) to a CAM module array (74) made up of CAM modules (62) interconnected by a cascade information bus (70) for comparison against pre-stored comparand databases (76). The CAM modules (62) of the CAM module array (74) provide search results (64) to the result dispatch unit (66) which generates results, typically multiple in parallel, at a result output (48). Optionally, multiple of the parallel search engines (30) may be cascaded by connection to an expansion bus (50) to form a mega search engine (88).

Abstract: A binary-ternary configurable content addressable memory (CAM) (100). A plurality of CAM cells (114) including comparator logic cells (116) and paired storage locations (118, 118a, 118b) are directed by a signal at a mode terminal (120) to compare data provided at an input bus (110), either in binary mode against pre-stored content data or in ternary mode against pre-stored content and mask data. The comparator logic cells (116) generate respective bit signals (122) based on such comparison, and in this manner the plurality of CAM cells (114) may collectively be part of a CAM array block (104), which may optionally in turn work with a match detection block (106) to generate a match signal (126), and which may optionally in turn work with a priority encoder block (108) to generate a result signal at a result output (112).