Patents by Inventor Paul C. McIntyre

Paul C. McIntyre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12166098
    Abstract: Ferroelectric materials and more particularly cerium-doped ferroelectric materials and related devices and methods are disclosed. Aspects of the present disclosure relate to ferroelectric layers of hafnium-zirconium-oxide (HZO) doped with cerium that enable reliable ferroelectric fabrication processes and related structures with significantly improved cycling endurance performance. Such doping in ferroelectric layers also provides the capability to modulate polarization to achieve a desired operation voltage range. Doping concentrations of cerium in HZO films are disclosed with ranges that provide a stabilized polar orthorhombic phase in resulting films, thereby promoting ferroelectric capabilities. Exemplary fabrication techniques for doping cerium in HZO films as well as exemplary device structures including metal-ferroelectric-metal (MFM) and metal-ferroelectric-insulator-semiconductor (MFIS) structures are also disclosed.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: December 10, 2024
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Paul C. McIntyre, Wilman Tsai, John D. Baniecki, Zhouchangwan Yu, Balreen Saini
  • Patent number: 9343291
    Abstract: Techniques include a method of forming an interfacial passivation layer between a first semiconductor material (such as germanium) and a high-k gate dielectric. Such techniques include using a hydrogen-based plasma formed using a slotted-plane antenna plasma processing system. Such a plasma treatment can be executed with substrate temperatures less than 380 degrees Celsius, and even down to about 200 degrees Celsius or below.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: May 17, 2016
    Assignees: Tokyo Electron Limited, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Toru Ito, Paul C. McIntyre
  • Patent number: 9099411
    Abstract: A device and a method of forming a continuous polycrystalline Ge film having crystalline Ge islands is provided that includes depositing an amorphous Ge (a-Ge) layer on a substrate, oxidizing the top surface of the a-Ge layer to form a GeOx layer, depositing a seed layer of Al on the GeOx layer and catalyzing the Al seed layer, where Ge mass transport is generated from the underlying a-Ge layer to the Al seed layer through the GeOx layer by thermal annealing, where a continuous polycrystalline Ge film having crystalline Ge islands is formed on the Al seed layer.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: August 4, 2015
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Shu Hu, Paul C. McIntyre
  • Publication number: 20140342575
    Abstract: Techniques include a method of forming an interfacial passivation layer between a first semiconductor material (such as germanium) and a high-k gate dielectric. Such techniques include using a hydrogen-based plasma formed using a slotted-plane antenna plasma processing system. Such a plasma treatment can be executed with substrate temperatures less than 380 degrees Celsius, and even down to about 200 degrees Celsius or below.
    Type: Application
    Filed: May 12, 2014
    Publication date: November 20, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Toru Ito, Paul C. Mcintyre
  • Publication number: 20130048985
    Abstract: A device and a method of forming a continuous polycrystalline Ge film having crystalline Ge islands is provided that includes depositing an amorphous Ge (a-Ge) layer on a substrate, oxidizing the top surface of the a-Ge layer to form a GeOx layer, depositing a seed layer of Al on the GeOx layer and catalyzing the Al seed layer, where Ge mass transport is generated from the underlying a-Ge layer to the Al seed layer through the GeOx layer by thermal annealing, where a continuous polycrystalline Ge film having crystalline Ge islands is formed on the Al seed layer.
    Type: Application
    Filed: August 24, 2011
    Publication date: February 28, 2013
    Inventors: Shu Hu, Paul C. McIntyre
  • Publication number: 20120216854
    Abstract: A photoelectrochemical regenerative photovoltaic cell is provided that includes an electrode structure having a semiconductor photoelectrode layer, and a pinhole-free metal oxide layer disposed on the semiconductor photoelectrode layer forming the electrode structure, where the pinhole-free metal oxide layer is less than 10 nm in thickness, where the thickness of the pinhole-free metal oxide layer protects the semiconductor photoelectrode layer from i) oxidation, ii) dissolution, or i) and ii) when in contact with an electrolyte solution, where the pinhole-free metal oxide layer has a band gap that is transparent to solar radiation and provides band offsets that permit facile electron or hole transport between the electrolyte solution and the semiconducting photoelectrode.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 30, 2012
    Inventors: Christopher E.D. Chidsey, Paul C. McIntyre
  • Patent number: 8221599
    Abstract: Embodiments of the present disclosure include an anode, devices and systems including the anode (e.g., electrochemical devices and photo-electrochemical devices), methods of using the anode, methods of producing H2 and O2 from H2O, Cl2, oxidixed organic feedstocks, oxidation for the detection and quantification of chemical species, and the like.
    Type: Grant
    Filed: April 2, 2010
    Date of Patent: July 17, 2012
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Christopher E. D. Chidsey, Paul C. McIntyre
  • Patent number: 8058643
    Abstract: Non-volatile resistance change memories, systems, arrangements and associated methods are implemented in a variety of embodiments. According to one embodiment, a memory cell having two sections with outwardly-facing portions, the outwardly-facing portions electrically coupled to electrodes is implemented. The memory cell has an ionic barrier between the two sections. The two sections and the ionic barrier facilitate movement of ions from one of the two sections to the other of the two sections in response to a first voltage differential across the outwardly-facing portions. The two sections and the ionic barrier diminish movement of ions from the one of the two sections to the other of the two sections in response to another voltage differential across the outwardly-facing portions.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: November 15, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Rene Meyer, Paul C. McIntyre
  • Publication number: 20100252441
    Abstract: Embodiments of the present disclosure include an anode, devices and systems including the anode (e.g., electrochemical devices and photo-electrochemical devices), methods of using the anode, methods of producing H2 and O2 from H2O, Cl2, oxidixed organic feedstocks, oxidation for the detection and quantification of chemical species, and the like.
    Type: Application
    Filed: April 2, 2010
    Publication date: October 7, 2010
    Inventors: Christopher Elisha Dunn Chidsey, Paul C. McIntyre
  • Patent number: 7724562
    Abstract: Non-volatile resistance change memories, systems, arrangements and associated methods are implemented in a variety of embodiments. According to one embodiment, resistance-change memory devices are implemented having a pair of electrodes and an intervening electrochemical material. A heating element facilitates changes in resistance of the electrochemical material-region due to changes in ion distribution. The method is implemented without a process for forming a filament-like region in the electrochemical material.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: May 25, 2010
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Rene Meyer, Paul C. McIntyre
  • Patent number: 7517818
    Abstract: A method and system for forming a nitrided germanium-containing layer by plasma processing. The method includes providing a germanium-containing substrate in a process chamber, generating a plasma from a process gas containing N2 and a noble gas, where the plasma conditions are selected effective to form plasma excited N2 species while controlling formation of plasma excited N species, and exposing the substrate to the plasma to form a nitrided germanium-containing layer on the substrate. A method is also provided that includes exposing a germanium-containing dielectric layer to liquid or gaseous H2O to alter the thickness and chemical composition of the layer.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 14, 2009
    Assignees: Tokyo Electron Limited, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Takuya Sugawara, Paul C. McIntyre
  • Patent number: 7517812
    Abstract: A method and system for forming a nitrided germanium-containing layer by plasma processing. The method includes providing a germanium-containing substrate in a process chamber, generating a plasma from a process gas containing N2 and a noble gas, where the plasma conditions are selected effective to form plasma excited N2 species while controlling formation of plasma excited N species, and exposing the substrate to the plasma to form a nitrided germanium-containing layer on the substrate. A method is also provided that includes exposing a germanium-containing dielectric layer to liquid or gaseous H2O to alter the thickness and chemical composition of the layer.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 14, 2009
    Assignees: Tokyo Electron Limited, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Takuya Sugawara, Paul C. McIntyre
  • Publication number: 20080106929
    Abstract: Non-volatile resistance change memories, systems, arrangements and associated methods are implemented in a variety of embodiments. According to one embodiment, resistance-change memory devices are implemented having a pair of electrodes and an intervening electrochemical material. A heating element facilitates changes in resistance of the electrochemical material-region due to changes in ion distribution. The method is implemented without a process for forming a filament-like region in the electrochemical material.
    Type: Application
    Filed: November 2, 2007
    Publication date: May 8, 2008
    Inventors: Rene Meyer, Paul C. McIntyre
  • Publication number: 20040144972
    Abstract: Carbon nanotube circuits are implemented with high-&kgr; dielectrics. According to one example embodiment of the present invention, a carbon nanotube circuit includes at least one carbon nanotube with a high-&kgr; dielectric material. In one implementation, a gate electrode is capacitively coupled to the carbon nanotube via the high-&kgr; dielectric material. Voltage applied to the gate electrode is thus capacitively coupled to the carbon nanotube to control, for example, electrical characteristics of the carbon nanotube. With this approach, the carbon nanotube circuit exhibits voltage-controllable characteristics that can be used for a variety of implementations.
    Type: Application
    Filed: October 6, 2003
    Publication date: July 29, 2004
    Inventors: Hongjie Dai, Paul C. McIntyre, Ali Javey