Patents by Inventor Paul D. Montane

Paul D. Montane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of analyzing integrated circuit power distribution in chips containing voltage islands
    Patent number: 6631502
    Abstract: A method of analyzing the power distribution in a chip containing one or more voltage islands, each voltage island having a power distribution network connected to a chip-level power distribution network by one or more voltage translation interface circuits. The method comprising: analyzing the voltage-island power distribution networks independently of the chip-level power distribution network to obtain voltage translation interface circuit currents; using the voltage translation interface circuit currents as input to a model of the chip-level power distribution network to obtain voltage translation interface circuit input voltages; and calculating voltage translation interface circuit output voltages based on the voltage translation interface circuit input voltages, the voltage translation interface circuit currents, and current-voltage characteristics of the voltage translation interface circuits.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: October 7, 2003
    Assignee: International Business Machines Corporation
    Inventors: Patrick H. Buffet, Joseph N. Kozhaya, Paul D. Montane, Robert A. Proctor, Erich C. Schanzenbach, Ivan L. Wemple
  • Method of analyzing integrated circuit power distribution in chips containing voltage islands
    Publication number: 20030135830
    Abstract: A method of analyzing the power distribution in a chip containing one or more voltage islands, each voltage island having a power distribution network connected to a chip-level power distribution network by one or more voltage translation interface circuits. The method comprising: analyzing the voltage-island power distribution networks independently of the chip-level power distribution network to obtain voltage translation interface circuit currents; using the voltage translation interface circuit currents as input to a model of the chip-level power distribution network to obtain voltage translation interface circuit input voltages; and calculating voltage translation interface circuit output voltages based on the voltage translation interface circuit input voltages, the voltage translation interface circuit currents, and current-voltage characteristics of the voltage translation interface circuits.
    Type: Application
    Filed: January 16, 2002
    Publication date: July 17, 2003
    Inventors: Patrick H. Buffet, Joseph N. Kozhaya, Paul D. Montane, Robert A. Proctor, Erich C. Schanzenbach, Ivan L. Wemple