Patents by Inventor Paul Dijkstra

Paul Dijkstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210386376
    Abstract: The present invention relates to electric components of interventional devices. In order to provide further miniaturization of medical interventional devices, an electric component (10) of an interventional device is provided. The component comprises a flat carrier base (12), at least one electric circuit (14) provided on a substrate (16) and at least one electric wire (18) connected to the electric circuit by a wire connection (20). The substrate is attached to the carrier base. Further, for the wire connection, the carrier base is provided with at least one opening (22) that is provided at least partly with a conductive edge portion (24), which edge portion is connected to the at least one electric circuit. Still further, the substrate is provided with at least one recess (26) aligned with the location of the at least one opening in the carrier base.
    Type: Application
    Filed: October 14, 2019
    Publication date: December 16, 2021
    Inventors: Johannes Wilhelmus WEEKAMP, Vincent Adrianus HENNEKEN, Marcus Cornelis LOUWERSE, Egbertus Reinier JACOBS, Paul DIJKSTRA
  • Patent number: 10501342
    Abstract: Methods and apparatus are provided for ultraviolet (UV) water purification, comprising UV-C LED modules having improved light extraction efficiency. UV-C LED dies (12) are solidly coupled to associated translucent output windows (14), such that light is transmitted directly from light-emitting surface(s) of the dies (12) to output window(s) (14) of the LED package—without propagation across interstitial air gaps. Gas-to-solid (and solid-to-gas) light transition boundaries are thus eliminated, significantly reducing the amount of light lost through inter-medium boundary reflection, and thereby increasing efficiency of light extraction.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: December 10, 2019
    Assignee: SIGNIFY HOLDING B.V.
    Inventors: Daiyu Hayashi, Jianghong Yu, Paul Dijkstra, Michiel Van Der Meer, Arie Jan Hovestad
  • Patent number: 10475973
    Abstract: A packaged light emitting device die 20 includes a package body having a profiled leadframe 10 embedded in a body 12 of reflecting material. The leadframe 10 is exposed on mounting surface 14 only on at least one solder bonding area 16. Solder 22 is present only on the at least one solder bonding area 16 and not elsewhere. The reflecting material provides the reflecting parts of the package so there is no need for a reflective layer to be deposited on leadframe 10. Moreover, the reflecting material can function as a solder resist to self-align the solder 22 to the at least one solder bonding area 16.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: November 12, 2019
    Assignee: LUMILEDS LLC
    Inventors: Paul Dijkstra, Aernout Reints Bok, Pascal Johannes Theodorus Lambertus Oberndorff, Lu Fei Zhang, Boudewijn Ruben De Jong, Marcus Franciscus Donker
  • Publication number: 20180086649
    Abstract: Abstract: Methods and apparatus are provided for ultraviolet (UV) water purification, comprising UV-C LED modules having improved light extraction efficiency. UV-C LED dies (12) are solidly coupled to associated translucent output windows (14), such that light is transmitted directly from light-emitting surface(s) of the dies (12) to output window(s) (14) of the LED package—without propagation across interstitial air gaps. Gas-to-solid (and solid-to-gas) light transition boundaries are thus eliminated, significantly reducing the amount of light lost through inter-medium boundary reflection, and thereby increasing efficiency of light extraction.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 29, 2018
    Applicant: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Daiyu HAYASHI, Jianghong YU, Paul DIJKSTRA, Michiel VAN DER MEER, Arie Jan HOVESTAD
  • Patent number: 9863585
    Abstract: A light source assembly, a method for producing a light source assembly, and a lamp are provided. In one example, the light source assembly comprises a substrate comprising first and second substrate portions being arranged at a tilt angle (?) to each other forming a V-shaped structure, wherein, at the tip of the V-shaped structure, the first portion comprises a first electrical terminal and the second portion comprises a second electrical terminal. The light source assembly further comprises a light source arranged to bridge a terminal gap between the first and second electrical terminals such that the light source is in electrical connection with the first and second electrical terminals.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: January 9, 2018
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: Boudewijn Ruben De Jong, Johannes Wilhelmus Weekamp, Paul Dijkstra, Marc Andre De Samber, Hendrik Jan Eggink
  • Publication number: 20170288109
    Abstract: A packaged light emitting device die 20 includes a package body having a profiled leadframe 10 embedded in a body 12 of reflecting material. The leadframe 10 is exposed on mounting surface 14 only on at least one solder bonding area 16. Solder 22 is present only on the at least one solder bonding area 16 and not elsewhere. The reflecting material provides the reflecting parts of the package so there is no need for a reflective layer to be deposited on leadframe 10. Moreover, the reflecting material can function as a solder resist to self-align the solder 22 to the at least one solder bonding area 16.
    Type: Application
    Filed: June 5, 2017
    Publication date: October 5, 2017
    Inventors: Paul Dijkstra, Aernout Reints Bok, Pascal Johannes Theodorus Lambertus Oberndorff, Lu Fei Zhang, Boudewijn Ruben De Jong, Marcus Franciscus Donker
  • Patent number: 9691959
    Abstract: A packaged light emitting device die includes a package body having a profiled leadframe embedded in a body of reflecting material. The leadframe is exposed on mounting surface only on at least one solder bonding area. Solder is present only on the at least one solder bonding area and not elsewhere. The reflecting material provides the reflecting parts of the package so there is no need for a reflective layer to be deposited on leadframe. Moreover, the reflecting material can function as a solder resist to self-align the solder to the at least one solder bonding area.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: June 27, 2017
    Assignee: Koninklijke Philips N.V.
    Inventors: Paul Dijkstra, Aernout Reints Bok, Pascal Johannes Theodorus Lambertus Oberndorff, Lu Fei Zhang, Boudewijn Ruben De Jong, Marcus Franciscus Donker
  • Publication number: 20160315237
    Abstract: A packaged light emitting device die includes a package body having a profiled leadframe embedded in a body of reflecting material. The leadframe is exposed on mounting surface only on at least one solder bonding area. Solder is present only on the at least one solder bonding area and not elsewhere. The reflecting material provides the reflecting parts of the package so there is no need for a reflective layer to be deposited on leadframe. Moreover, the reflecting material can function as a solder resist to self-align the solder to the at least one solder bonding area.
    Type: Application
    Filed: January 7, 2015
    Publication date: October 27, 2016
    Inventors: Paul Dijkstra, Aernout Reints Bok, Pascal Johannes Theodorus Lambertus Oberndorff, Lu Fei Zhang, Boudewijn Ruben De Jong, Marcus Franciscus Donker
  • Publication number: 20160109110
    Abstract: A light source assembly, a method for producing a light source assembly, and a lamp are provided. In one example, the light source assembly comprises a substrate comprising first and second substrate portions being arranged at a tilt angle (?) to each other forming a V-shaped structure, wherein, at the tip of the V-shaped structure, the first portion comprises a first electrical terminal and the second portion comprises a second electrical terminal. The light source assembly further comprises a light source arranged to bridge a terminal gap between the first and second electrical terminals such that the light source is in electrical connection with the first and second electrical terminals.
    Type: Application
    Filed: October 20, 2015
    Publication date: April 21, 2016
    Inventors: Boudewijn Ruben DE JONG, Johannes Wilhelmus WEEKAMP, Paul DIJKSTRA, Marc Andre DE SAMBER, Hendrik Jan EGGINK
  • Patent number: 9066926
    Abstract: The present invention relates to a method of treating exercise-induced joint pain in arthritis-free mammals by the administration of undenatured Type II collagen.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: June 30, 2015
    Assignee: Interhealth Nutraceuticals, Inc.
    Inventors: Paul Dijkstra, Francis C. Lau, James Lugo, Zainulabedin M. Saiyed
  • Publication number: 20150119335
    Abstract: The present invention relates to a method of treating exercise-induced joint pain in arthritis-free mammals by the administration of undenatured Type II collagen.
    Type: Application
    Filed: January 13, 2014
    Publication date: April 30, 2015
    Applicant: Interhealth Nutraceuticals, Inc.
    Inventors: Paul Dijkstra, Francis C. Lau, James Lugo, Zainulabedin M. Saiyed
  • Publication number: 20120286410
    Abstract: Disclosed is a discrete semiconductor device package (100) comprising a leadframe portion (10) comprising a recess (14) having a depth substantially equal to the thickness of the discrete semiconductor device (20), wherein a raised portion of the leadframe portion adjacent to said recess defines a first contact area (12); a discrete semiconductor device (20) in said recess, wherein the exposed surface (22) of the discrete semiconductor device defines a second contact area; a protective layer (30) covering the leadframe portion and the a discrete semiconductor device but not the first contact area and the second contact area; and respective plating layers (40) covering the first contact area and the second contact area. A method of manufacturing such a package and a carrier comprising such a package are also disclosed.
    Type: Application
    Filed: November 10, 2011
    Publication date: November 15, 2012
    Applicant: NXP B.V.
    Inventors: Roelf Anco Jacob GROENHUIS, Sven WALCZYK, Paul DIJKSTRA, Emiel de BRUIN
  • Patent number: 8183682
    Abstract: A method of packaging a semiconductor die. The method comprises mounting a semiconductor die to a die attach pad on a carrier and electrically coupling an electrode of the semiconductor die and a contact pad on the carrier with a clip carried by a sacrificial substrate. The method further comprises removing the sacrificial substrate to release the clip. The method may be extended to accommodate a carrier having multiple device regions each with a die attach pad and a contact pad for mounting multiple semiconductor die.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: May 22, 2012
    Assignee: NXP B.V.
    Inventors: Paul Dijkstra, Roelf Anco Jacob Groenhuis
  • Publication number: 20120112351
    Abstract: Disclosed is a method of manufacturing a discrete semiconductor device package (100), comprising providing a wafer comprising a plurality of semiconductor devices (50), each of said semiconductor devices comprising a substrate (110) having a top contact (130) and a bottom contact (150); partially sawing said wafer with a first sawing blade such that the semiconductor devices are partially separated from each other by respective incisions (20); lining said incisions with an electrically insulating film (160); and sawing through said incisions with a second sawing blade such that the semiconductor devices are fully separated from each other. A resulting discrete semiconductor device package (100) and a carrier (200) comprising such a discrete semiconductor device package (100) are also disclosed.
    Type: Application
    Filed: November 9, 2011
    Publication date: May 10, 2012
    Applicant: NXP B.V.
    Inventors: Sven WALCZYK, Roelf Anco Jacob GROENHUIS, Paul Dijkstra, Emiel de BRUIN, Rolf Brenner
  • Patent number: 8159826
    Abstract: An inorganic solder mask (48) for use as a surface treatment in masking a connection conductor (32) of a semiconductor chip package (10) against solder wetting when mounting the chip package (10) to a printed wiring board (50) or other substrate. The connection conductor (32) is partially covered by a metallization contact (42) formed from a distinct metal. The inorganic solder mask (46) is applied to an exposed portion (44) of the connection conductor (32) not covered by the metallization contact (42). The metallization contact (42) is not coated by the inorganic solder mask (46). The presence of the inorganic solder mask (46) significantly reduces or prevents wetting of the exposed portion (44) when molten solder is present on the connection conductor (32) without affecting the solidified solder layer (48) formed on the metallization contact (42). As a result, an extraneous mass of solder does not solidify on the exposed portion (44) of the connection conductor (32).
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: April 17, 2012
    Assignee: NXP B.V.
    Inventors: Paul Dijkstra, Hans Van Rijckevorsel, Roelf Groenhuis
  • Patent number: 8153480
    Abstract: According to an example embodiment, there is method (100) for manufacturing a semiconductor device in an air-cavity package. For a device die having an active surface, a lead frame is provided (5), the lead frame has a top-side surface and an under-side surface, the lead frame has predetermined pad landings on the top-side surface. A laminate material is applied (10) to the top-side surface of the lead frame. In the laminate material, an air-cavity region and contact regions are defined (15, 20, 25, 30, 35). The contact regions provide electrical connections to the predetermined pad landings on the lead frame. With the active circuit surface in an orientation toward the laminate material, the device die is mounted (40, 45). The bond pads of the active surface circuit are connected with ball bonds to the predetermined pad landings on the lead frame. An air-cavity is formed between the active surface of the device die and the top-side surface of the lead frame.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: April 10, 2012
    Assignee: NXP B.V.
    Inventors: Geert Steenbruggen, Paul Dijkstra
  • Patent number: 8070971
    Abstract: An improved method of etching a structure and a structure etched by the method is disclosed. The bottom side of a leadframe of an IC-package is an example of a structure, which advantageously may be etched with the disclosed method. The method includes the steps of providing an etch mask to the substrate to be etched. The etch mask comprising at least two sub-mask: a first sub-mask covering the area which substantially should remain after the etching process, and a second sub-mask covering an area to be removed in the etching process. The second sub-mask is a sacrificial mask in the form of a grid. The presence of the second sub-mask increases the etching speed in the area covered by it.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: December 6, 2011
    Assignee: NXP B.V.
    Inventors: Jan Kloosterman, Paul Dijkstra
  • Patent number: 7989934
    Abstract: A carrier (100) for bonding a semiconductor chip (114) onto is provided, wherein the carrier (100) comprises a die pad (101) and a plurality of contact pads (102), wherein each of the plurality of contact pads (102) comprises an electrically conductive multilayer stack, wherein the electrically conductive multilayer stack comprises a surface layer (109), a first buffer layer, and a first conductive layer (108). Furthermore, the first buffer layer comprises a material adapted to prevent diffusion of material of the surface layer (109) into the first conductive layer (108), and at least two of the contact pads (102) has an ultrafine pitch relative to each other.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: August 2, 2011
    Assignee: NXP B.V.
    Inventors: Klaas Heres, Paul Dijkstra, Maarten Nollen
  • Patent number: 7944062
    Abstract: A die package (72) for a semiconductor die (20). A plurality of the die packages (72) are formed on a single carrier (10) by applying a body (55) of molding compound across a carrier (10) with an air cavity (70) defined in the molding compound about each of a plurality of device regions (12) of the carrier (10). After a semiconductor die (20) is attached inside the air cavity (70) of each device region (12) and electrically connected with at least one contact pad (14, 16, 18), a cover (68) is applied to close all of the air cavities (70). Following singulation, each semiconductor die (20) is located inside the sealed air cavity (70) of one die package (72). The molding compound of each die package (72) may be locked against movement relative to the device region (12) of the carrier (10) by locking features (30, 38, 48, 50).
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: May 17, 2011
    Assignee: NXP B.V.
    Inventors: Roelf Anco Jacob Groenhuis, Paul Dijkstra
  • Patent number: 7858444
    Abstract: The device has a carrier and an electric element. The carrier has a first and an opposed side and is provided with an connection layer, an intermediate layer and contact pads. The element is present at the first side and coupled to the connection layer. It is at least partially encapsulated by an encapsulation that extends into isolation areas between patterns in the intermediate layer. A protective layer is present at the second side of the carrier, which covers an interface between the contact pads and the intermediate layer.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: December 28, 2010
    Assignee: NXP B.V.
    Inventors: Cornelis Gerardus Schriks, Paul Dijkstra, Peter Wilhelmus Maria Van De Water, Roelf Anco Jacob Groenhuis, Johannus Wilhelmus Weekamp