Patents by Inventor Paul Dragon

Paul Dragon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10892361
    Abstract: A transistor includes a substrate of a first conductivity type. An epitaxial layer of the first conductivity type is formed at a top surface of the substrate. A first region of the first conductivity type is formed as a well in the epitaxial layer. A second region of a second conductivity type is formed as a well in the epitaxial layer adjacent to the first region and the second conductivity type is opposite of the first conductivity type. A third region of the second conductivity type is formed in the first region and a portion of the first region forms a channel region between the third region and the second region. An emitter region of the first conductivity type is formed in the second region. A gate dielectric is formed over the channel region, and a gate electrode is formed on gate dielectric with the gate electrode overlapping at least a portion of second region and the third region.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: January 12, 2021
    Assignee: NXP USA, INC.
    Inventors: Zihao M. Gao, Christopher Paul Dragon, Walter Sherrard Wright
  • Publication number: 20200152787
    Abstract: A transistor includes a substrate of a first conductivity type. An epitaxial layer of the first conductivity type is formed at a top surface of the substrate. A first region of the first conductivity type is formed as a well in the epitaxial layer. A second region of a second conductivity type is formed as a well in the epitaxial layer adjacent to the first region and the second conductivity type is opposite of the first conductivity type. A third region of the second conductivity type is formed in the first region and a portion of the first region forms a channel region between the third region and the second region. An emitter region of the first conductivity type is formed in the second region. A gate dielectric is formed over the channel region, and a gate electrode is formed on gate dielectric with the gate electrode overlapping at least a portion of second region and the third region.
    Type: Application
    Filed: January 20, 2020
    Publication date: May 14, 2020
    Inventors: ZIHAO M. GAO, CHRISTOPHER PAUL DRAGON, WALTER SHERRARD WRIGHT
  • Patent number: 10593796
    Abstract: A transistor includes a substrate of a first conductivity type. An epitaxial layer of the first conductivity type is formed at a top surface of the substrate. A first region of the first conductivity type is formed as a well in the epitaxial layer. A second region of a second conductivity type is formed as a well in the epitaxial layer adjacent to the first region and the second conductivity type is opposite of the first conductivity type. A third region of the second conductivity type is formed in the first region and a portion of the first region forms a channel region between the third region and the second region. An emitter region of the first conductivity type is formed in the second region. A gate dielectric is formed over the channel region, and a gate electrode is formed on gate dielectric with the gate electrode overlapping at least a portion of second region and the third region.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: March 17, 2020
    Assignee: NXP USA, INC.
    Inventors: Zihao M. Gao, Christopher Paul Dragon, Walter Sherrard Wright
  • Publication number: 20190181262
    Abstract: A transistor includes a substrate of a first conductivity type. An epitaxial layer of the first conductivity type is formed at a top surface of the substrate. A first region of the first conductivity type is formed as a well in the epitaxial layer. A second region of a second conductivity type is formed as a well in the epitaxial layer adjacent to the first region and the second conductivity type is opposite of the first conductivity type. A third region of the second conductivity type is formed in the first region and a portion of the first region forms a channel region between the third region and the second region. An emitter region of the first conductivity type is formed in the second region. A gate dielectric is formed over the channel region, and a gate electrode is formed on gate dielectric with the gate electrode overlapping at least a portion of second region and the third region.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 13, 2019
    Inventors: Zihao M. Gao, Christopher Paul Dragon, Walter Sherrard Wright
  • Patent number: 6625616
    Abstract: A method and apparatus for materials requirements planning that implements a client/server computer network with an algorithm which enables receiving and preserving input data from the client in a stateless protocol in the server, the input data from a client is preprocessed to determine the MPR state, and stored for each client in the server in a separate side container using stateless protocols. A side container containing a client's data is accessed by distinct SQL and VB code routines to perform specific reports, modification of a required materials order and/or adjustment of material availability for use dates. The preprocessing arranges the input data into record sets of all scheduled material requirements, all currently available and required materials and all unfulfilled ordered materials. The preprocessing is executed via SQL, and the processing is executed via executable code into a temporary record set that is placed into a storage container.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: September 23, 2003
    Inventors: Paul Dragon, Rande W. Newberry