Abstract: The present invention describes systems and methods to for providing stable and programmable voltage and current reference devices. An exemplary embodiment of the present invention provides a voltage reference device having a first floating-gate transistor with a first source, a first drain, and a first gate. The first gate is provided coupled to a first programming capacitor and a first input capacitor. Furthermore, the voltage reference device includes a second floating-gate transistor having a second source, a second drain, and a second gate. The second gate is provided coupled to a second programming capacitor and a second input capacitor. Additionally, the charge difference between the first floating-gate transistor and the second floating-gate transistor is a reference voltage.

Abstract: The present invention describes systems and methods to for providing stable and programmable voltage and current reference devices. An exemplary embodiment of the present invention provides a voltage reference device having a first floating-gate transistor with a first source, a first drain, and a first gate. The first gate is provided coupled to a first programming capacitor and a first input capacitor. Furthermore, the voltage reference device includes a second floating-gate transistor having a second source, a second drain, and a second gate. The second gate is provided coupled to a second programming capacitor and a second input capacitor. Additionally, the charge difference between the first floating-gate transistor and the second floating-gate transistor is a reference voltage.

Abstract: A large-scale field-programmable analog array (FPAA) for rapidly prototyping analog systems and an arbitrary analog waveform generator. The large-scale FPAA includes a floating-gate transistor array and a plurality of computational analog blocks (CABs), which may be adapted to set bias voltages for operational transconductance amplifiers (OTAs), adjust corner frequencies on the capacitively coupled current conveyors, set multiplier coefficients in vector-matrix multipliers, and a variety of other operations. The floating-gate transistors may be used as switch elements, programmable resistor elements, precision current sources, and programmable transistors. Accordingly, the floating-gate transistors within the array allow on-chip programming of the characteristics of the computational elements, while still maintaining compact CABs. The arbitrary analog waveform generator may include programmable floating-gate MOS transistors for use as analog memory cells to store samples of the waveforms.

Abstract: The present invention relates to systems and methods for sensing capacitance change of a capacitive sensor and for optimizing a capacitive sensing circuit. In an exemplary embodiment, a capacitive sensor may be coupled to an amplifier at floating node. A programming circuit is connected to the floating node for controlling a charge on the floating node. A method of controlling the charge of the floating node is also provided. The method includes applying a first predetermined voltage to a source of a programming transistor, applying a second predetermined voltage to a floating gate of the programming transistor, and applying a third predetermined voltage to a drain of the programming transistor until a charge on the floating gate of the programming transistor reaches a predetermined value. The charge on the floating gate of the programming transistor drives the charge on the floating node to the predetermined value, and thus is controlled.

Abstract: Hot-electron injection driven by a hole impact ionization mechanism at the channel-drain junction provides a new method of hot electron injection. Using this mechanism, a four-terminal pFET floating-gate silicon MOS transistor for analog learning applications provides nonvolatile memory storage. Electron tunneling permits bidirectional memory updates. Because these updates depend on both the stored memory value and the transistor terminal voltages, the synapses can implement a learning function. The synapse learning follows a simple power law. Unlike conventional EEPROMs, the synapses allow simultaneous memory reading and writing. Synapse transistor arrays can therefore compute both the array output, and local memory updates, in parallel. Synaptic arrays employing these devices enjoy write and erase isolation between array synapses is better than 0.01% because the tunneling and injection processes are exponential in the transistor terminal voltages.

Abstract: An autozeroing floating-gate amplifier (AFGA) is an integrated continuous-time filter that is intrinsically autozeroing. It can achieve a highpass characteristic at frequencies well below 1 Hz. In contrast with conventional autozeroing amplifiers that eliminate their input offset, the AFGA nulls its output offset. The AFGA is a continuous-time filter; it does not require any clocking. The AFGA includes at least one floating-gate MOS transistor that is capable of hot-electron injection of electrons onto the floating gate of the MOS transistor. Electrons are continuously removed from the floating gate(s), for example, via Fowler-Nordheim tunneling. The AFGA has a stable equilibrium for which this tunneling current is balanced by an injection current of equal magnitude.

Abstract: A three-terminal silicon MOS transistor with a time-varying transfer function is provided which may operate both as a single transistor analog learning device and as a single transistor non-volatile analog memory. The time-varying transfer function is achieved by adding or removing electrons from the fully insulated floating gate of an N-type MOS floating gate transistor. The transistor has a control gate capacitively coupled to the floating gate; it is from the perspective of this control gate that the transfer function of the transistor is modified. Electrons are removed from the floating gate via Fowler-Nordheim tunneling. Electrons are added to the floating gate via hot-electron injection.

Abstract: An autozeroing floating-gate amplifier (AFGA) is an integrated continuous-time filter that is intrinsically autozeroing. It can achieve a highpass characteristic at frequencies well below 1 Hz. In contrast with conventional autozeroing amplifiers that eliminate their input offset, the AFGA nulls its output offset. The AFGA is a continuous-time filter; it does not require any clocking. The AFGA includes at least one floating-gate MOS transistor that is capable of hot-electron injection of electrons onto the floating gate of the MOS transistor. Electrons are continuously removed from the floating gate(s), for example, via Fowler-Nordheim tunneling. The AFGA has a stable equilibrium for which this tunneling current is balanced by an injection current of equal magnitude.

Abstract: A three-terminal silicon MOS transistor with a time-varying transfer function is provided which may operate both as a single transistor analog learning device and as a single transistor non-volatile analog memory. The time-varying transfer function is achieved by adding or removing electrons from the fully insulated floating gate of an N-type MOS floating gate transistor. The transistor has a control gate capacitively coupled to the floating gate; it is from the perspective of this control gate that the transfer function of the transistor is modified. Electrons are removed from the floating gate via Fowler-Nordheim tunneling. Electrons are added to the floating gate via hot-electron injection.

Abstract: A silicon MOS transistor with a time-varying transfer function is provided which may operate both as a single transistor analog learning device and as a single transistor non-volatile analog memory. The time-varying transfer function is achieved by adding or removing electrons from the fully insulated floating gate of an N-type MOS floating gate transistor. The transistor has a control gate capacitively coupled to the floating gate; it is from the perspective of this control gate that the transfer function of the transistor is modified. Electrons are removed from the floating gate via Fowler-Nordheim tunneling. Electrons are added to the floating gate via hot-electron injection.