Abstract: Methods and apparatus to dynamically assign and relocate object fragments in distributed storage systems are disclosed.

Abstract: Methods and apparatus to dynamically assign and relocate object fragments in distributed storage systems are disclosed.

Abstract: Methods and apparatus to dynamically assign and relocate object fragments in distributed storage systems are disclosed.

Abstract: Methods and apparatus to dynamically assign and relocate object fragments in distributed storage systems are disclosed.

Abstract: Methods and apparatus to dynamically assign and relocate object fragments in distributed storage systems are disclosed. In some examples, the methods and apparatus encode an object with error correction coding to separate the object into fragments, create a first index indicative of storage nodes where the fragments of the object are to be stored, encode a second index into identifiers of the fragments of the object, the second index based on the first index, and store the fragments of the object and the corresponding second index encoded identifiers in the storage nodes based on the first index.

Abstract: Methods and apparatus related to dynamic management of relationships in distributed object stores are described. In one embodiment, one or more links are generated between two or more objects of the object stores. A single request directed at a first object may return data corresponding to the first object and one or more other objects. Other embodiments are also disclosed and claimed.

Abstract: Methods and apparatus to dynamically assign and relocate object fragments in distributed storage systems are disclosed. In some examples, the methods and apparatus encode an object with error correction coding to separate the object into fragments, create a first index indicative of storage nodes where the fragments of the object are to be stored, encode a second index into identifiers of the fragments of the object, the second index based on the first index, and store the fragments of the object and the corresponding second index encoded identifiers in the storage nodes based on the first index.

Abstract: Methods and systems to configure an object-based storage cluster with multiple selectable data handling policies, including to map an object to a storage device/node of the cluster based on the policy associated with the object. In an embodiment, each policy is associated with a respective one of multiple rings, partitions of which are mapped to storage devices of the same cluster, objects are associated with buckets/containers, and each bucket/container is associated within a user-selectable one of the policies, such as with a metadata-based policy index, and an object is mapped to a storage device/node of the cluster based on the ring associated with the policy index of the object's container.

Abstract: An interface to one or more hardware devices includes a configuration library and objects to model the hardware. Software programs using the interface need not understand how to communicate with the hardware. Instead, the software programs may communicate with the interface. In turn, the interface communicates with the hardware. The software may be written when the hardware implementation features are unknown.

Abstract: In one embodiment of the present invention, a process that uses a first processor is provided. The process includes the operation of blocking by the first processor of completion by a second processor of a configuration cycle. The process also includes the operation of selecting by the first processor of one procedure from a plurality of procedures that are associated with respective types of circuitry that may be used to permit the first processor to control a device. The one procedure is associated with one of the respective types of circuitry that is actually available to be used by the first processor.

Abstract: In one embodiment, a method is provided. The method of this embodiment may include detecting an operation initiated by a first device that can result in a change of a first set of resources previously allocated to a second device. If the operation has completed at least a certain phase of the operation and the first set of resources has changed as a result of the operation, the method of this embodiment may also comprise changing, by the second device, a second set of resources previously allocated by the second device to a third device. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract: In one embodiment, a method is provided. The method of this embodiment may include controlling, at least in part, by a first device, whether a first signal line of a second device is coupled to a bus, and whether a second signal line of a third device is coupled to the bus. The method of this embodiment may also include, after the first and second signal lines are coupled to the bus, supplying from the first device to the second and third devices, via the first and second signal lines, one or more signals that, after being received by the second and third devices, may permit, at least in part, at least one of control and configuration by the first device of the second and third devices. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract: In one embodiment of the present invention, a process that uses a first processor is provided. The process includes the operation of blocking by the first processor of completion by a second processor of a configuration cycle. The process also includes the operation of selecting by the first processor of one procedure from a plurality of procedures that are associated with respective types of circuitry that may be used to permit the first processor to control a device. The one procedure is associated with one of the respective types of circuitry that is actually available to be used by the first processor.

Abstract: According to one embodiment of the present invention, an apparatus is provided which includes a first address translation unit and a second address translation unit. The first address translation unit is programmed for a minimum amount of memory addresses required to accept control transactions on a first bus. The second address translation unit is programmed to a memory address range that corresponds to an amount of local memory for caching operations between the first I/O processor and a first I/O interconnect device and an amount of memory space required by the I/O interconnect device. The apparatus includes logic to determine, upon receiving an incoming host request, whether a reply address corresponding to the host request overlaps with the memory address range programmed for the second address translation unit. The apparatus further includes logic to dynamically alter a data flow between the first I/O interconnect device and the host.

Abstract: In one embodiment, a method is provided. The method of this embodiment may include detecting an operation initiated by a first device that can result in a change of a first set of resources previously allocated to a second device. If the operation has completed at least a certain phase of the operation and the first set of resources has changed as a result of the operation, the method of this embodiment may also comprise changing, by the second device, a second set of resources previously allocated by the second device to a third device. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract: In one embodiment, a method is provided. The method of this embodiment may include controlling, at least in part, by a first device, whether a first signal line of a second device is coupled to a bus, and whether a second signal line of a third device is coupled to the bus. The method of this embodiment may also include, after the first and second signal lines are coupled to the bus, supplying from the first device to the second and third devices, via the first and second signal lines, one or more signals that, after being received by the second and third devices, may permit, at least in part, at least one of control and configuration by the first device of the second and third devices. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract: According to one embodiment of the present invention, an apparatus is provided which includes a first address translation unit and a second address translation unit. The first address translation unit is programmed for a minimum amount of memory addresses required to accept control transactions on a first bus. The second address translation unit is programmed to a memory address range that corresponds to an amount of local memory for caching operations between the first I/O processor and a first I/O interconnect device and an amount of memory space required by the I/O interconnect device. The apparatus includes logic to determine, upon receiving an incoming host request, whether a reply address corresponding to the host request overlaps with the memory address range programmed for the second address translation unit.

Abstract: In one embodiment, a method is provided. The method of this embodiment may include the initiating of a scan of a bus, the determining, based at least in part upon the scan, of a location of a device, and, prior to the initiation of the scan, the controlling of coupling of the device to the bus. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract: In one embodiment, a method is provided. The method of this embodiment may include the allocating of a first set of resources to a first device, and the allocating, by the first device, of a second set of resources to a second device. The first set of resources may include the second set of resources. If the first set of resources is changed, the method of this embodiment may also including the changing, by the first device, of the second set of resources. Of course, many modifications, variations, and alternatives are possible without departing from this embodiment.

Abstract: In one embodiment of the present invention, a process that uses a first processor is provided. The process includes the operation of blocking by the first processor of completion by a second processor of a configuration cycle. The process also includes the operation of selecting by the first processor of one procedure from a plurality of procedures that are associated with respective types of circuitry that may be used to permit the first processor to control a device. The one procedure is associated with one of the respective types of circuitry that is actually available to be used by the first processor.