Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Abstract: Methods and apparatus for amplifier AM and PM predistortion and autocalibration. AM and PM amplifier distortion can be corrected using predistortion. The AM and PM distortion characteristics of the amplifier are determined using an autocalibration technique. The amplifier characteristics can be stored in distinct look up tables. Alternatively, the inverse of the amplifier characteristics can be stored in distinct look up tables. Signals that are to be amplified are characterized in polar format having a phase component with a normalized magnitude and a magnitude component. The phase component can be predistorted by applying the inverse of the PM distortion characteristics to the signal. Similarly, the magnitude component can be predistorted by applying the inverse of the AM distortion characteristics to the signal. The predistorted phase component can be amplified using the previously characterized amplifier.

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Abstract: A system and method for generating a local oscillator (LO) frequency in a zero intermediate frequency (IF) receiver or transmitter is presented. A signal is received from a voltage controlled oscillator (VCO). The signal has a VCO frequency. The VCO frequency is divided by a number N to produce a signal having a divided-down frequency. The signal having the VCO frequency is then mixed with the signal having the divided-down frequency to produce an output signal having an output frequency. Local oscillator leakage is reduced. Thus, the receiver or transmitter may operate in multiple wireless communication bands and modes and meet the associated specifications.

Abstract: A system and method for a multi-band direct conversion wireless communication receiver is presented. The system incorporates a low noise amplifier (LNA) configured to amplify received RF signals, a local oscillator (LO) configured to output a frequency, and I and Q channel mixers. Each mixer has a first input operatively coupled to the LNA, a second input operatively coupled to the LO output, and an output. The system further includes an adjustment mechanism configured to adjust drive level of the LO depending on a level of jammers detected by the receiver. Thus, the receiver may operate in multiple wireless communication bands and modes and meet the associated specifications.

Abstract: A system and method for generating a local oscillator (LO) frequency in a zero intermediate frequency (IF) receiver or transmitter is presented. A signal is received from a voltage controlled oscillator (VCO). The signal has a VCO frequency. The VCO frequency is divided by a number N to produce a signal having a divided-down frequency. The signal having the VCO frequency is then mixed with the signal having the divided-down frequency to produce an output signal having an output frequency. Local oscillator leakage is reduced. Thus, the receiver or transmitter may operate in multiple wireless communication bands and modes and meet the associated specifications.

Abstract: A portable phone has an outer casing with opposite upper and lower walls, one of the walls having an opening for access to the interior of the casing, and a lid removably mounted in the opening for normally closing the opening. A main circuit board is mounted in the outer casing, with a plurality of phone components mounted on the circuit board. A predetermined region of the board aligned with the opening is left exposed or empty of components, and forms a recess for receiving a battery. The battery receiving recess has contact pads, and a battery is removably engaged in the recess with battery contacts engaging the contact pads in the recess, whereby the battery can be removed and replaced via the opening after opening the lid.

Abstract: A system and method for generating a local oscillator (LO) frequency in a zero intermediate frequency (IF) receiver or transmitter is presented. A signal is received from a voltage controlled oscillator (VCO). The signal has a VCO frequency. The VCO frequency is divided by a number N to produce a signal having a divided-down frequency. The signal having the VCO frequency is then mixed with the signal having the divided-down frequency to produce an output signal having an output frequency. Local oscillator leakage is reduced. Thus, the receiver or transmitter may operate in multiple wireless communication bands and modes and meet the associated specifications.

Abstract: A direct downconversion receiver architecture having a DC loop to remove DC offset from the signal components, a digital variable gain amplifier (DVGA) to provide a range of gains, an automatic gain control (AGC) loop to provide gain control for the DVGA and RF/analog circuitry, and a serial bus interface (SBI) unit to provide controls for the RF/analog circuitry via a serial bus. The DVGA may be advantageously designed and located as described herein. The operating mode of the VGA loop may be selected based on the operating mode of the DC loop, since these two loops interact with one another. The duration of time the DC loop is operated in an acquisition mode may be selected to be inversely proportional to the DC loop bandwidth in the acquisition mode. The controls for some or all of the RF/analog circuitry may be provided via the serial bus.

Abstract: A system and method for a multi-band direct conversion wireless communication receiver is presented. The system incorporates a low noise amplifier (LNA) configured to amplify received RF signals, a local oscillator (LO) configured to output a frequency, and I and Q channel mixers. Each mixer has a first input operatively coupled to the LNA, a second input operatively coupled to the LO output, and an output. The system further includes an adjustment mechanism configured to adjust drive level of the LO depending on a level of jammers detected by the receiver. Thus, the receiver may operate in multiple wireless communication bands and modes and meet the associated specifications.

Abstract: A system and method for a multi-band direct conversion wireless communication receiver is presented. The system incorporates a low noise amplifier (LNA) configured to amplify received RF signals, a local oscillator (LO) configured to output a frequency, and I and Q channel mixers. Each mixer has a first input operatively coupled to the LNA, a second input operatively coupled to the LO output, and an output. The system further includes an adjustment mechanism configured to adjust drive level of the LO depending on a level of jammers detected by the receiver. Thus, the receiver may operate in multiple wireless communication bands and modes and meet the associated specifications.

Abstract: A portable phone has an outer casing with opposite upper and lower walls, one of the walls having an opening for access to the interior of the casing, and a lid removably mounted in the opening for normally closing the opening. A main circuit board is mounted in the outer casing, with a plurality of phone components mounted on the circuit board. A predetermined region of the board aligned with the opening is left exposed or empty of components, and forms a recess for receiving a battery. The battery receiving recess has contact pads, and a battery is removably engaged in the recess with battery contacts engaging the contact pads in the recess, whereby the battery can be removed and replaced via the opening after opening the lid.

Abstract: A battery protection circuit for an external battery pack has a switch for controlling connection of a battery output to a load, and a detector for detecting a resistance at a load output terminal. A first comparator compares the detected resistance to a predetermined maximum value, and a second comparator compares the detected resistance to a predetermined minimum value. If the detected resistance is in the range between the minimum and maximum values, a control signal is produced to enable connection of the battery output to the load. If the detected resistance is outside the range, the switch is disabled and no current can flow to the load.

Abstract: An amplifier having an adjustable current source which can be controlled to provide the requisite level of performance at reduced current consumption. The amplifier is first designed using one of many designs available and known in the art. A current source is then designed to provide adjustable bias current for the amplifier. The current source can be designed with MOSFETs which require no additional bias current and can accept a standard digital control signal. The current source can also be designed with active devices which are selected based on the logic of the control signals for ease of interface. The bias current determines the linearity and noise performance of the amplifier. The bias current is adjusted to provide the requisite level of performance while reducing power consumption. The current source can be designed to operate in discrete steps or to have substantially continuous current steps.

Abstract: A portable phone has an internal battery and an external battery pack is releasably attachable to the phone. A control unit in the phone controls connection of the respective batteries to a phone power input, depending on the detection of the external battery voltage. Whenever an external battery is present with a voltage above a predetermined minimum value, the external battery will be connected to the phone power input to provide power to operate the phone, so that the internal battery lifetime is extended. When the external battery voltage falls below the minimum value, or the external battery is removed, the unit automatically switches to internal battery power, so that the external battery can be changed without interrupting power supply to the phone, if the phone is on or during a call.

Abstract: A battery protection circuit for an external battery pack has a switch for controlling connection of a battery output to a load and a detector for detecting a resistance at a load output terminal. A first comparator compares the detected resistance to a predetermined maximum value, and a second comparator compares the detected resistance to a predetermined minimum value. If the detected resistance is in the range between the minimum and maximum values, a control signal is produced to enable connection of the battery output to the load. If the detected resistance is outside the range, the switch is disabled and no current can flow to the load.