Abstract: The data processing device maintains two stacks. The length of the basic unit of information is different for each stack. Pops and pushes cause a change in the stack pointer which differs dependent on which stack is used. Instructions refer to different locations on the stack as registers defined by an offset of a number of basic units relative to the top of stack. In an embodiment a reference to registers is normally interpreted as a reference to one of a set of registers (including the top of stack register) without push or pop, but a reference to one register is interpreted as a reference to top of stack including a push or pop.

Abstract: The data processing device maintains two stacks. The length of the basic unit of information is different for each stack. Pops and pushes cause a change in the stack pointer which differs dependent on which stack is used. Instructions refer to different locations on the stack as registers defined by an offset of a number of basic units relative to the top of stack. In an embodiment a reference to registers is normally interpreted as a reference to one of a set of registers (including the top of stack register) without push or pop, but a reference to one register is interpreted as a reference to, top of stack including a push or pop.

Abstract: With respect to a particular facility semaphore-based synchronizing is executed among a first station and one or more second stations. For each station a single bivalent semaphore is provided. The first station checks all second station semaphores as having a second state relative to its own semaphore's first state. It then executes a first accessing operation and flips the first state. Otherwise it foregoes the first accessing operation. Any second station checks the first station semaphore as having the second state relative to its own semaphore's second state. It then executes a second accessing operation an d flips the latter state. Otherwise it foregoes the second accessing operation.

Abstract: Method and System For Synchronizing Block-Organized Data Transfer Amongst a Plurality of Producer and Consumer Stations. With respect to a particular facility semaphore-based synchronizing is executed among a first station and one or more second stations. For each station a single bivalent semaphore is provided. The first station checks all second station semaphores as having a second state relative to its own semaphore's first state. It then executes a first accessing operation and flips the first state. Otherwise it foregoes the first accessing operation. Any second station checks the first station semaphore as having the second state relative to its own semaphore's second state. It then executes a second accessing operation and flips the latter state. Otherwise it foregoes the second accessing operation.

Abstract: The data processing device maintains two stacks. The length of the basic unit of information is different for each stack. Pops and pushes cause a change in the stack pointer which differs dependent on which stack is used. Instructions refer to different locations on the stack as registers defined by an offset of a number of basic units relative to the top of stack. In an embodiment a reference to registers is normally interpreted as a reference to one of a set of registers (including the top of stack register) without push or pop, but a reference to one register is interpreted as a reference to top of stack including a push or pop.

Abstract: The data processing device maintains two stacks. The length of the basic unit of information is different for each stack. Pops and pushes cause a change in the stack pointer which differs dependent on which stack is used. Instructions refer to different locations on the stack as registers defined by an offset of a number of basic units relative to the top of stack. In an embodiment a reference to registers is normally interpreted as a reference to one of a set of registers (including the top of stack register) without push or pop, but a reference to one register is interpreted as a reference to top of stack including a push or pop.

Abstract: In an instruction a relative jump distance is expressed as a number of instructions rather than as a number of addresses. Instructions have various lengths. After encountering the instruction the processing device loads the following instructions but suppresses execution of a set of instructions that consists of the number of instructions expressed in the relative jump instruction.

Abstract: A data processor of modular architecture comprises a plurality of operation units, each serving to implement specific functionalities as required by the instruction set that determines the processor's operation. Register files for several ones among the operation units are merged. At least one of the register files is exclusively assigned to one of the operation units. At the expense of only a marginal increase, if any, of the number of instruction cycles, smaller register file areas in an IC embodiment, less register file control circuitry and simpler microcode words are obtained.