Patents by Inventor Paul Eaves

Paul Eaves has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020082834
    Abstract: Systems and methods are provided for speech recognition. The systems and methods are operative to evaluate a spoken word and determine one or more characteristics of a speech waveform corresponding to the spoken word. The speech waveform is converted to a digital pulse waveform based on a threshold level. One or more characteristics of the speech waveform can be analyzed utilizing the digital pulse waveform. The threshold level can be adjustable so that varying voltage amplitudes of speech waveforms can be considered. The one or more characteristics can be matched with one or more stored characteristics to determine the spoken word associated with the speech waveform between a set of selectable words having different waveform characteristics.
    Type: Application
    Filed: November 15, 2001
    Publication date: June 27, 2002
    Inventors: George Paul Eaves, Geoffrey James Martindale
  • Patent number: 6192430
    Abstract: A mixed-signal processor (MSP) chip with a flexible serial interface which simultaneously accommodates two serial ports on a reduced number of pins. The pin definitions of these serial ports are configured to function well with several different external chips. Any two of these chips, or two of any one of these chips, may be used concurrently by the present MSP. When used with chips that require it, the present MSP chip provides a clock signal to each of these. When used with other chips, the MSP will can receive a clock signal from an external chip, and will then pass this signal through to any chip on the other of the two serial ports.
    Type: Grant
    Filed: February 25, 1998
    Date of Patent: February 20, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Ching-yuh Tsay, Richard E. Downing, George Paul Eaves, Craig Lance Dalley, Ian Lloyd Bower
  • Patent number: 6141739
    Abstract: A computing device (10) includes a processor (14) coupled to a memory interface (28). The memory interface (28) supports access to a variety of memories (12) using at least two different data lengths. The memory interface (28) includes an address register (50, 52) for receiving addressing information to access the memory (12). A mode bit (80) and a high/low bit (82) in the address register (50, 52) determine the different operating modes of the memory interface (28).
    Type: Grant
    Filed: October 23, 1997
    Date of Patent: October 31, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: John D. Provence, Ian L. Bower, Paul Eaves, Craig L. Dalley