Patents by Inventor Paul Edward Movall
Paul Edward Movall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7254815Abstract: Distributed event management in an embedded support processor computer system includes an embedded support processor having an event distribution agent used to communicate with local processes internal to the embedded support processor. A process communicates with the event distribution agent of the embedded support processor and registers for one or more events. Another process signals an event to the event distribution agent of the embedded support processor. The event distribution agent of the embedded support processor notifies each registered process of the signaled event. The event distribution agent of the embedded support processor is used to communicate with a peer event distribution agent included in a main processor of the embedded support processor computer system, and to communicate over a network with a peer event distribution agent included in an attached device, such as a personal computer.Type: GrantFiled: April 24, 2003Date of Patent: August 7, 2007Assignee: International Business Machines CorporationInventors: Clinton Gene Laschkewitsch, Paul Edward Movall, Ward Ray Nelson
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Patent number: 7089414Abstract: A method, apparatus, and computer instructions for determining validity of and updating a microcode image. Responsive to initiation of an update process, a first validity indicator is checked to determine whether a first microcode image in the memory is valid. In response to the first microcode image being valid, a second validity indicator is set indies, to indicate that a second microcode image is invalid, and the update process is allowed to update the second microcode image to form an updated microcode image. A determination is made as to whether the updated microcode image is valid. The second validity indicator is set to indicate that the updated microcode is valid if the updated image is valid. The second validity indicator is checked during booting of a data processing system. If the second validity indicator is valid, the updated microcode will be loaded.Type: GrantFiled: April 10, 2003Date of Patent: August 8, 2006Assignee: International Business Machines CorporationInventors: John Steven Langford, Michael Youhour Lim, Paul Edward Movall, Thomas Joseph Warne
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Patent number: 7089450Abstract: A recovery process for embedded processors monitors other processes in the system. Each process may specify a recovery policy residing in nonvolatile electronic memory that preferably includes a recovery count, a recovery time, and a recovery action. If a process terminates unexpectedly, the recovery process determines whether the process had a corresponding recovery policy. If not, the recovery process does not recover the process. If the process has a corresponding recovery policy, the recovery process determines whether it can recover the process by examining the recovery count and recovery time specified in the recovery policy. If the process can be recovered, the recovery process performs the recovery action specified in the corresponding recovery policy. If the process cannot be recovered, the recovery process resets the system.Type: GrantFiled: April 24, 2003Date of Patent: August 8, 2006Assignee: International Business Machines CorporationInventors: Gary D. Anderson, Andreas Arnez, Joshua W. Boyer, Gerald G. Kreissig, Paul Edward Movall, Ward R. Nelson
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Method and apparatus for abstraction of physical hardware implementation to logical software drivers
Patent number: 7069206Abstract: A method and apparatus are provided for abstraction of a physical hardware implementation to logical software drivers. An operating system kernel includes a device driver layer, an enhanced I/O abstraction layer and physical hardware implementation details layer. The physical hardware implementation details layer encapsulates hardware details for the physical hardware implementation. The enhanced I/O abstraction layer abstracts the hardware details for the device driver layer and creates unique logical I/O device structures for each embedded function in the physical hardware implementation. By using the enhanced I/O abstraction layer, device drivers maintain their independence from the physical hardware implementation. Using the enhanced I/O abstraction layer also enables a single driver with one binary image to support embedded functions spread out across multiple chip implementations, and multiple instances of an embedded function on one or multiple chips.Type: GrantFiled: April 24, 2003Date of Patent: June 27, 2006Assignee: International Business Machines CorporationInventors: Paul Edward Movall, Shaun Allan Wetzstein -
Publication number: 20040216136Abstract: A method, apparatus and computer program product are provided for implementing distributed event management in an embedded support processor computer system. An embedded support processor includes an event distribution agent used to communicate with local processes internal to the embedded support processor. A process communicates with the event distribution agent of the embedded support processor and registers for one or more events. Another process signals an event to the event distribution agent of the embedded support processor. The event distribution agent of the embedded support processor notifies each registered process of the signaled event. The event distribution agent of the embedded support processor is used to communicate with a peer event distribution agent included in a main processor of the embedded support processor computer system, and to communicate over a network with a peer event distribution agent included in an attached device, such as a personal computer.Type: ApplicationFiled: April 24, 2003Publication date: October 28, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Clinton Gene Laschkewitsch, Paul Edward Movall, Ward Ray Nelson
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Publication number: 20040215997Abstract: A recovery process for embedded processors monitors other processes in the system. Each process may specify a recovery policy residing in nonvolatile electronic memory that preferably includes a recovery count, a recovery time, and a recovery action. If a process terminates unexpectedly, the recovery process determines whether the process had a corresponding recovery policy. If not, the recovery process does not recover the process. If the process has a corresponding recovery policy, the recovery process determines whether it can recover the process by examining the recovery count and recovery time specified in the recovery policy. If the process can be recovered, the recovery process performs the recovery action specified in the corresponding recovery policy. If the process cannot be recovered, the recovery process resets the system.Type: ApplicationFiled: April 24, 2003Publication date: October 28, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Gary D. Anderson, Andreas Arnez, Joshua W. Boyer, Gerald G. Kreissig, Paul Edward Movall, Ward R. Nelson
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Method and apparatus for abstraction of physical hardware implementation to logical software drivers
Publication number: 20040215439Abstract: A method and apparatus are provided for abstraction of a physical hardware implementation to logical software drivers. An operating system kernel includes a device driver layer, an enhanced I/O abstraction layer and physical hardware implementation details layer. The physical hardware implementation details layer encapsulates hardware details for the physical hardware implementation. The enhanced I/O abstraction layer abstracts the hardware details for the device driver layer and creates unique logical I/O device structures for each embedded function in the physical hardware implementation. By using the enhanced I/O abstraction layer, device drivers maintain their independence from the physical hardware implementation. Using the enhanced I/O abstraction layer also enables a single driver with one binary image to support embedded functions spread out across multiple chip implementations, and multiple instances of an embedded function on one or multiple chips.Type: ApplicationFiled: April 24, 2003Publication date: October 28, 2004Applicant: International Business Machines CorporationInventors: Paul Edward Movall, Shaun Allan Wetztein -
Publication number: 20040205328Abstract: A method, apparatus, and computer instructions for determining validity of and updating a microcode image. Responsive to initiation of an update process, a validity indicator is checked to determine whether the microcode image in the memory is valid. The validity is set indicator to indicate that the microcode image is invalid, in response to the microcode image being valid. Responsive to the microcode image being valid, the update process is allowed to update the microcode image to form an updated microcode image. A determination is made as to whether the updated microcode image is valid. The validity indicator is set to indicate that the microcode is valid if the updated image is valid. The validity indicator is checked during booting of a data processing system to determine whether to load the microcode image. If the validity indicator is valid, the microcode will be loaded. Otherwise, an alternative microcode image is loaded or an error report is generated.Type: ApplicationFiled: April 10, 2003Publication date: October 14, 2004Applicant: International Business Machines CorporationInventors: John Steven Langford, Michael Youhour Lim, Paul Edward Movall, Thomas Joseph Warne
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Patent number: 6742139Abstract: A method, system, and apparatus for reestablishing communications between a host and a service processor after the service processor has ceased to function correctly is provided. In one embodiment, the host exchanges heartbeat signals with the service processor. The heartbeat signals indicate that the service processor is active and functioning. In response to a failure to receive a heartbeat signal or in response to some other indication that the service processor is not performing correctly, the host causes a hard reset of the service processor. In addition, the service processor can detect a failure within itself and initiate a hard reset to itself. After the hard reset, the service processor returns to a monitoring mode without performing initial tests of the data processing system. Furthermore, the data processing system remains active and is not shut down during the hard reset of the service processor.Type: GrantFiled: October 19, 2000Date of Patent: May 25, 2004Assignee: International Business Machines CorporationInventors: Stephanie Maria Forsman, Brent William Jacobs, Kevin Gene Kehne, Paul Edward Movall
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Patent number: 6721839Abstract: A method and apparatus are provided for mapping multiple address spaces into a single bus, such as a single peripheral component interconnect (PCI) bus. The single bus is coupled to a first processor complex and a second processor complex. An original address of a memory access is shifted to a unique address space for each originator/target of an operation. The shifted address is used on the single bus. Then the shifted address is shifted back to the original address for completing the operation on a destination bus. The original address of a memory access is shifted to a unique address space for each originator/target of an operation using a respective predefined value (+X1, +X2, or +X3) for shifting the original address above a predefined boundary for each originator/target of the operation.Type: GrantFiled: December 27, 2000Date of Patent: April 13, 2004Assignee: International Business Machines CorporationInventors: Ellen Marie Bauman, David Lee Dosch, Charles Scott Graham, Brian Gerard Holthaus, Daniel Robert Lipps, Daniel Frank Moertl, Paul Edward Movall, Daniel Paul Wetzel
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Patent number: 6665813Abstract: A method and an apparatus is presented for updating flash memory that contains a write protected code, a first copy of rewritable recovery code, a second copy of rewritable recovery code, and a rewritable composite code. Each block of rewritable code contains a checksum code to detect if the block of code has been corrupted. If it is detected that the first copy of the recovery code is corrupted then the second copy of the recovery code is copied into the first copy of the recovery code. If it is detected the second copy of the recovery code is corrupted then the first copy of the recovery code is copied into the second copy of the recovery code. The recovery code is responsible for checking and updating the composite code. If it is detected the composite code is corrupted then a fresh copy of the composite code is obtained from a removable storage device or a network connection.Type: GrantFiled: August 3, 2000Date of Patent: December 16, 2003Assignee: International Business Machines CorporationInventors: Stephanie Maria Forsman, Shawn Michael Lambeth, Chetan Mehta, Paul Edward Movall
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Patent number: 6542939Abstract: In an electrical system having a connector board with at least one electrical connector thereon for receiving an electrical device therein, volumetric vital product parametric data is stored in memory associated with the connector board. The stored volumetric vital product parametric data can be accessed with the electrical system to check for available space for a proposed electrical device, for example. The stored data may include information about dimensional characteristics of the connector board and the at least one electrical connector. This data can be compared with corresponding data for the electrical device to determine compatibility, for example.Type: GrantFiled: August 10, 1999Date of Patent: April 1, 2003Assignee: International Business Machines CorporationInventors: Thomas James Osten, Paul Edward Movall, Neil Clair Berglund, Nancy Marie Uthke-Schmucki, Patrick Allen Buckland, David Lee Dosch, Stephen Peter Mroz, David G. Lund
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Patent number: 6289405Abstract: In an electrical system having a chassis with at least one chassis slot for receiving a chassis electrical device, and at least one connector board with at least one board slot thereon for receiving a connector board electrical device therein, respective memory is provided for storing vital product parametric data associated with the at least one chassis slot, the at least one connector board slot, and the respective electrical devices. The stored vital product parametric data can be accessed by the electrical system to check compatibility.Type: GrantFiled: March 10, 1999Date of Patent: September 11, 2001Assignee: International Business Machines CorporationInventors: Paul Edward Movall, Thomas James Osten
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Patent number: 6233641Abstract: A primary PCI bus and multiple secondary PCI busses of a PCI expansion card interface, are interconnected by a routing circuit. The routing circuit functions as a switched bridge between the primary PCI bus and each of the secondary PCI busses, respectively, by associating each secondary PCI bus with an address range, and forwarding a command received from the primary PCI bus to a secondary PCI bus mapped to an address range including the address of the command. Furthermore, the routing circuit forwards commands intended for the primary PCI bus from the secondary PCI busses. In addition, the routing circuit directly routes commands between the secondary PCI busses, when commands received from one secondary PCI bus are intended for another PCI bus, without use of the primary bus. As a result, traffic and latency on the primary PCI bus is reduced and efficiency is increased.Type: GrantFiled: June 8, 1998Date of Patent: May 15, 2001Assignee: International Business Machines CorporationInventors: Charles Scott Graham, Shawn Michael Lambeth, Daniel Frank Moertl, Paul Edward Movall
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Patent number: 6219761Abstract: An input/output bus architecture that includes: an input/output bus; an input/output device connected to the input/output bus; a main processor, connected to the input/output bus, for executing a device driver corresponding to the input/output device, the device driver generating load/store commands for the input/output device; and a load/store assist engine, connected to the input/output bus and yet independent of the main processor, for loading/storing data to/from the input/output device according to the load/store commands from the device driver. The load/store assist engine decouples the main processor from latencies associated with execution of the load/store commands. The device driver is reassigned to the main processor, rather than being found in a device that is external to the main processor, such as an input/output processor.Type: GrantFiled: May 6, 1998Date of Patent: April 17, 2001Assignee: International Business Machines CorporationInventors: Paul Edward Movall, Charles Scott Graham, Shawn Michael Lambeth, Daniel Frank Moertl
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Patent number: 6101557Abstract: A method, device and system for configuring multifunction I/O device adapters connected to a bus utilizes a slot owner configuration register to identify the ownership of each function slot within the multi-function I/O device adapter. An intelligent I/O device adapter or controller within the multi-function I/O device adapter may control other I/O adapters located in other function slots through the information provided in the slot owner configuration register. Ownership of each slot is initially set, upon power up, to the host unit or processor complex. Thereafter, each intelligent I/O device adapter or controller determines the presence of adapters at other function slots to be controlled, and records this information in the slot owner configuration register.Type: GrantFiled: May 29, 1998Date of Patent: August 8, 2000Assignee: International Business Machines CorporationInventors: Paul Edward Movall, Charles Scott Graham, Shawn M. Lambeth, Daniel Frank Moertl
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Patent number: 6085277Abstract: An interrupt and message batching apparatus and method reduces the number and frequency of processor interrupts and resulting context switches by grouping I/O completion events together with a single processor interrupt in a manner that balances I/O operation latency requirements with processor utilization requirements to optimize overall computer system performance. The invention sends a message from a processor complex to an I/O adapter on an I/O bus commanding an I/O device connected to the I/O adapter to perform a function. Upon completion of the commanded function, the message processor in the I/O adapter generates a message and sends it to the processor complex on the I/O bus. The message is enqueued in the message queue of the memory, a message count is updated, and processor complex interrupt is signalled if and when the message count exceeds a message pacing count.Type: GrantFiled: October 15, 1997Date of Patent: July 4, 2000Assignee: International Business Machines CorporationInventors: Gregory Michael Nordstrom, Shawn Michael Lambeth, Paul Edward Movall, Daniel Frank Moertl, Charles Scott Graham, William Joseph Armstrong, Thomas Rembert Sand
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Patent number: 6073253Abstract: An apparatus, system and method permitting a variety of reset procedures and corresponding reset states. A device reset control register is provided for each I/O device adapter in single function or multifunction devices. The device reset control registers permit a greater degree of control over single function devices, multifunction device as a whole and individual device functions within a multifunction device. A device immediate status register synchronizes the various reset procedures. A logical power on reset procedure, a directed unit reset procedure and a directed interface reset procedure utilize the greater degree of control that the device reset control registers provide to force the I/O device adapter, single function device or multifunction device into a corresponding logical power on reset state, a directed unit reset state or a directed interface reset state.Type: GrantFiled: December 19, 1997Date of Patent: June 6, 2000Assignee: International Business Machines CorporationInventors: Gregory Michael Nordstrom, Shawn Michael Lambeth, Paul Edward Movall, Daniel Frank Moertl, Charles Scott Graham, Paul John Johnsen, Thomas Rembert Sand
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Patent number: 6023736Abstract: An apparatus, system and method permitting dynamic configuration of I/O device adapters connected to a bus utilizes a function configuration register to store a READY/NOT READY status for each of the I/O device adapters. Upon the occurrence of a reset condition, dynamic configuration decision logic detects which I/O device adapters are connected to the bus, determines configuration parameters for each connected I/O device adapter, initializes the configuration space for each connected I/O device adapter, and then sets a corresponding flag in the function configuration register to indicate ready status. An I/O device driver interrupts a configuration process to examine the function configuration register. If ready status can be confirmed from this function configuration register within a time out period, then the configuration process may proceed; otherwise, a device error recovery process is initiated.Type: GrantFiled: December 19, 1997Date of Patent: February 8, 2000Assignee: International Business Machines CorporationInventors: Shawn Michael Lambeth, Charles Scott Graham, Daniel Frank Moertl, Paul Edward Movall, Gregory Michael Nordstrom
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Patent number: 5983292Abstract: An I/O system including a processor complex and system main memory connected to I/O adapters via I/O adapters and I/O bus. A message transport mechanism and method stores an upstream message queue and a downstream message queue in system main memory. Queue addresses are stored both in system main memory and designated registers of I/O adapters. The I/O adapters utilize the queue addresses to manage the transfer of downstream command messages and to send upstream response messages to the system main memory via direct memory access across the I/O bus.Type: GrantFiled: October 15, 1997Date of Patent: November 9, 1999Assignee: International Business Machines CorporationInventors: Gregory Michael Nordstrom, Shawn Michael Lambeth, Paul Edward Movall, Daniel Frank Moertl, Charles Scott Graham, Thomas Rembert Sand