Patents by Inventor Paul F Gerrish
Paul F Gerrish has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120064670Abstract: Apparatus and methods to protect circuitry from moisture ingress, e.g., using a metallic structure as part of a moisture ingress barrier.Type: ApplicationFiled: November 22, 2011Publication date: March 15, 2012Applicant: Medtronic, Inc.Inventors: Tyler Mueller, Geoffrey Batchelder, Ralph B. Danzl, Paul F. Gerrish, Anna J. Malin, Trevor D. Marrott, Michael F. Mattes
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Patent number: 8125058Abstract: An apparatus and method uses a first Faraday cage portion and a second Faraday cage portion to provide a Faraday cage enclosure surrounding at least one circuit device. For example, the first Faraday cage portion may include a first conductive portion of a Faraday cage enclosure surrounding the at least one circuit device, and a second Faraday cage portion may include a second conductive portion of the Faraday cage enclosure surrounding the at least one circuit device. Further, for example, the first Faraday cage portion may include a connection surface having one or more conductive contact portions terminating the first conductive portion of the Faraday cage enclosure the second Faraday cage portion may include a connection surface having one or more conductive contact portions terminating the second conductive portion of the Faraday cage enclosure. An electrical connection may be provided between the conductive contact portions of the first and second Faraday cage portions.Type: GrantFiled: September 29, 2009Date of Patent: February 28, 2012Assignee: Medtronic, Inc.Inventors: Tyler Mueller, Larry E. Tyler, Geoffrey Batchelder, Paul F. Gerrish, Michael F. Mattes, Anna J. Malin
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Patent number: 8072056Abstract: Apparatus and methods to protect circuitry from moisture ingress, e.g., using a metallic structure as part of a moisture ingress barrier.Type: GrantFiled: September 29, 2009Date of Patent: December 6, 2011Assignee: Medtronic, Inc.Inventors: Tyler Mueller, Geoffrey Batchelder, Ralph B. Danzl, Paul F. Gerrish, Anna J. Malin, Trevor D. Marrott, Michael F. Mattes
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Patent number: 7902851Abstract: Electrical circuit apparatus and methods including hermeticity testing structures for testing the hermeticity of the electrical circuit apparatus.Type: GrantFiled: September 29, 2009Date of Patent: March 8, 2011Assignee: Medtronic, Inc.Inventors: Andreas Armin Fenner, Geoffrey Batchelder, Paul F. Gerrish, Lary R. Larson, Anna J. Malin, Trevor D. Marrott, Tyler Mueller, David A. Ruben
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Publication number: 20100324614Abstract: An implantable medical system includes a first die substrate with a first outer surface. The system also includes a second die substrate with a second outer surface. Furthermore, the system includes a medical device with a first portion that is mounted to the first die substrate and a second portion that is mounted to the second die substrate. The first and second die substrates are fixed to each other and substantially hermetically sealed to each other. Also, the medical device is substantially encapsulated between the first and second die substrates. The first portion is electrically connected to the second portion. Moreover, the first and second outer surfaces of the first and second die substrates are directly exposed to a biological material.Type: ApplicationFiled: June 18, 2009Publication date: December 23, 2010Applicant: MEDTRONIC, INC.Inventors: Michael F. Mattes, Paul F. Gerrish, Anna J. Malin, Tyler J. Mueller, Geoffrey DeWitt Batchelder, Clark B. Norgaard, Michael A. Schugt, Ralph Danzl, Richard J. O'Brien
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Publication number: 20100314149Abstract: Hermetically-sealed electrical circuit apparatus and methods for constructing such apparatus using one or more seal portions.Type: ApplicationFiled: September 29, 2009Publication date: December 16, 2010Applicant: Medtronic, Inc.Inventors: Paul F. Gerrish, Geoffrey Batchelder, Andreas Armin Fenner, Lary R. Larson, Anna J. Malin, Michael F. Mattes, Tyler Mueller, David A. Ruben, Larry E. Tyler
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Publication number: 20100314733Abstract: Apparatus and methods to protect circuitry from moisture ingress, e.g., using a metallic structure as part of a moisture ingress barrier.Type: ApplicationFiled: September 29, 2009Publication date: December 16, 2010Applicant: Medtronic, Inc.Inventors: Tyler Mueller, Geoffrey Batchelder, Ralph B. Danzl, Paul F. Gerrish, Anna J. Malin, Trevor D. Marrott, Michael F. Mattes
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Publication number: 20100315110Abstract: Electrical circuit apparatus and methods including hermeticity testing structures for testing the hermeticity of the electrical circuit apparatus.Type: ApplicationFiled: September 29, 2009Publication date: December 16, 2010Applicant: Medtronic, Inc.Inventors: Andreas Armin Fenner, Geoffrey Batchelder, Paul F. Gerrish, Lary R. Larson, Anna J. Malin, Trevor D. Marrott, Tyler Mueller, David A. Ruben
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Publication number: 20100314726Abstract: An apparatus and method uses a first Faraday cage portion and a second Faraday cage portion to provide a Faraday cage enclosure surrounding at least one circuit device.Type: ApplicationFiled: September 29, 2009Publication date: December 16, 2010Applicant: Medtronic, Inc.Inventors: Tyler Mueller, Larry E. Tyler, Geoffrey Batchelder, Paul F. Gerrish, Michael F. Mattes, Anna J. Malin
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Publication number: 20100165709Abstract: An SRAM having two capacitors connected in series between respective bit storage nodes of each memory cell. The two inverters of the memory cell are powered by a positive voltage and a low voltage. The two capacitors are connected to each other at a common node. A leakage current generator is coupled to the common node. The leakage current generator supplies to the common node a leakage current to maintain a voltage which is approximately halfway between the voltages of the high and low SRAM supplies.Type: ApplicationFiled: December 22, 2009Publication date: July 1, 2010Applicants: STMICROELECTRONICS, INC., STMICROELECTRONICS SA, MEDTRONIC, INC.Inventors: Kevin K. Walsh, Paul F. Gerrish, Larry E. Tyler, Mark A. Lysinger, David C. McClure, Francois Jacquet
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Publication number: 20090270953Abstract: A reflectance-type optical sensor includes one or more photodiodes formed in a semiconductor substrate. A well having sidewalls and a bottom is formed in the top surface of the substrate, and a reflective layer is formed on the sidewalls and bottom. A light-emitting diode (LED) is mounted in the well, so that light emitted laterally and rearwardly from the LED strikes the sidewalls or bottom and is redirected in a direction generally perpendicular to the top surface of the substrate. The optical sensor can be fabricated using microelectromechanical systems (MEMS) fabrication techniques.Type: ApplicationFiled: April 23, 2008Publication date: October 29, 2009Inventors: Robert M. Ecker, Jonathan L. Kuhn, James D. Reinke, Can Cinbis, Timothy J. Davis, Paul F. Gerrish, Jonathan P. Roberts
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Patent number: 7477943Abstract: Methods and apparatus are provided for manufacturing a medical device. An implantable medical device includes a semiconductor substrate, an epitaxial layer, and a power transistor. The epitaxial layer overlies the semiconductor substrate. The power transistor is formed in the epitaxial layer and includes a first electrode, a control electrode, and a second electrode. The power transistor has a voltage breakdown greater than 100 volts. The current flow of the power transistor is vertical through the epitaxial layer to the semiconductor substrate. A backside contact couples to the first electrode of the power transistor. A method of manufacturing a medical device includes a power transistor formed in an epitaxial layer overlying a semiconductor substrate. A deep trench is etched through the epitaxial layer exposing the semiconductor substrate. A first electrode contact region couples to an exposed area of the semiconductor substrate in the deep trench.Type: GrantFiled: November 26, 2003Date of Patent: January 13, 2009Assignee: Medtronic, Inc.Inventors: Ralph B. Danzl, Mark R. Boone, Paul F. Gerrish, Michael F. Mattes, Tyler Mueller, Jeff Van Wagoner
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Patent number: 7196889Abstract: An overvoltage protection device is formed in a semiconductor substrate having a plurality of doped regions for forming semiconductor devices. The overvoltage protection device is adapted to draw current away from a device to be protected from excess voltage and has a switchable device having a terminal adapted to be coupled to a potential source of excess voltage and to the semiconductor substrate for drawing current away from the potential source of excess voltage when the switchable device is triggered, and for directing the current to the semiconductor substrate. A Zener diode is coupled to a second terminal of the switchable device to trigger the switchable device to a conducting state. The Zener diode is formed in the same doped region of the substrate as the trigger of the switchable device.Type: GrantFiled: November 15, 2002Date of Patent: March 27, 2007Assignee: Medtronic, Inc.Inventors: Paul F Gerrish, Tyler J Mueller, Andreas A. Fenner, Mark Blanchfield
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Publication number: 20040095698Abstract: An overvoltage protection device is formed in a semiconductor substrate having a plurality of doped regions for forming semiconductor devices. The overvoltage protection device is adapted to draw current away from a device to be protected from excess voltage and has a switchable device having a terminal adapted to be coupled to a potential source of excess voltage and to the semiconductor substrate for drawing current away from the potential source of excess voltage when the switchable device is triggered, and for directing the current to the semiconductor substrate.Type: ApplicationFiled: November 15, 2002Publication date: May 20, 2004Applicant: Medtronic, Inc.Inventors: Paul F. Gerrish, Tyler J. Mueller, Andreas A. Fenner, Mark Blanchfield
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Patent number: 6627917Abstract: Methods and apparatus for burn-in of integrated circuit (IC) dies at the wafer level. In one embodiment, a wafer is fabricated having an array of dies formed thereon wherein the dies are separated by scribe areas. Surrounding each die is one or more ring conductors which are electrically coupled to various circuits on the die via die bond pads. The wafer further includes a series of conductive pads located in an inactive region of the wafer. Electrically connecting the conductive pads to the ring conductors is a series of redundant scribe conductors. During burn-in, a burn-in indicating apparatus located on each die monitors burn-in parameters such as elapsed burn-in time. The indicating apparatus further records the elapsed burn-in time (or other parameter). The indicating apparatus may be subsequently interrogated to verify the burn-in time.Type: GrantFiled: April 25, 2000Date of Patent: September 30, 2003Assignee: Medtronic, Inc.Inventors: Andreas A. Fenner, Lary R. Larson, Paul F. Gerrish, Daniel E. Fulton, James W. Bell, James Thomas May