Abstract: A three-level detector circuit may comprise an input node and a pair of diode-connected transistors having respective drain terminals coupled to the input node. The pair of diode-connected transistors may be configured to set a voltage if the input voltage at the input node corresponds to an open input. The three-level detector circuit may further comprise a pair of inverting stages coupled to the input node, the pair of inverting stages configured to distinguish between low, high, and/or open inputs. The three-level detector circuit may also comprise a pair of latches, e.g. D-flip-flops, each of the pair of latches having a respective input coupled to a respective output of a respective one of the pair of inverting stages, and each of the pair of latches configured to latch a present state of the input in detection mode. In one set of embodiments, the three-level detector circuit is operable to cease conducting current after the present state of the input has been latched.

Abstract: A regulator circuit may be configured to operate with multiple power supplies. The regulator circuit may be configured to receive an input voltage and provide a regulated output voltage at an output terminal as a function of the input voltage. The regulator may include at least two drivers. A first driver may have a driver output coupled to the output terminal and have a supply terminal coupled to a high power supply, and a second driver may have a driver output coupled to the output terminal and have a supply terminal coupled to a low power supply. A selector circuit may be configured to compare the input voltage with a control voltage that has a magnitude just below a magnitude of the low power supply, to determine which driver to select from the first driver and the second driver, and enable either the first driver output or the second driver output to be active according to which driver has been selected.

Abstract: A three-level detector circuit may comprise an input node and a pair of diode-connected transistors having respective drain terminals coupled to the input node. The pair of diode-connected transistors may be configured to set a voltage if the input voltage at the input node corresponds to an open input. The three-level detector circuit may further comprise a pair of inverting stages coupled to the input node, the pair of inverting stages configured to distinguish between low, high, and/or open inputs. The three-level detector circuit may also comprise a pair of latches, e.g. D-flip-flops, each of the pair of latches having a respective input coupled to a respective output of a respective one of the pair of inverting stages, and each of the pair of latches configured to latch a present state of the input in detection mode. In one set of embodiments, the three-level detector circuit is operable to cease conducting current after the present state of the input has been latched.

Abstract: A driver circuit with variable output voltage and current. A source input terminal of the driver circuit may receive a source control signal. A voltage control circuit may drive one of the terminals of a first switch to a source voltage. If the source input terminal receives an asserted source control signal, the first switch is turned on and the voltage control circuit drives an output terminal of the driver circuit to the source voltage. A source current mirror may regulate a source current provided to the output terminal of the driver circuit. A sink input terminal of the driver circuit may receive a sink control signal. If the sink input terminal receives an asserted sink control signal, a second switch is turned on and the output terminal is driven to a sink voltage. A sink current mirror may regulate a sink current provided to output terminal of the driver circuit.

Abstract: A driver circuit with variable output voltage and current. A source input terminal of the driver circuit may receive a source control signal. A voltage control circuit may drive one of the terminals of a first switch to a source voltage. If the source input terminal receives an asserted source control signal, the first switch is turned on and the voltage control circuit drives an output terminal of the driver circuit to the source voltage. A source current mirror may regulate a source current provided to the output terminal of the driver circuit. A sink input terminal of the driver circuit may receive a sink control signal. If the sink input terminal receives an asserted sink control signal, a second switch is turned on and the output terminal is driven to a sink voltage. A sink current mirror may regulate a sink current provided to output terminal of the driver circuit.

Abstract: Various embodiments of a voltage level detector implemented as an integrated circuit whose trip point is approximately constant over variations in temperature as well as variations in transistor fabrication parameters are disclosed along with a differential amplifier whose input offset voltage is highly immune to said variations. In one embodiment, a voltage generator supplies a composite voltage to the gate of the tail current transistor of the voltage level detector or differential amplifier. The first component of the voltage is approximately equal to the threshold voltage of NMOS transistors comprised in the device over variations in operating temperature as well as variations in transistor fabrication parameters while the second component is approximately constant with respect to said variations. When applied to the gate of the tail current transistor, the first component may turn the transistor on in spite of the above-mentioned parametric variations.

Abstract: In one embodiment, a system comprises a programming unit coupled to at least one programmable fuse and configured to program the programmable fuse. In addition, the system comprises a monitoring circuit coupled to the programmable fuse and configured to monitor electrical characteristics associated with the programmable fuse while the programmable fuse is being programmed. In one embodiment, the monitoring circuit is configured to detect a voltage associated with the programmable fuse. Furthermore, the monitoring circuit is configured to compare the detected voltage associated with the programmable fuse with a predetermined voltage value (i.e., endpoint detection). If the detected voltage is equal to or less than the predetermined voltage value, the monitoring circuit is configured to change a state of a control signal to stop the programming of the programmable fuse. Otherwise, the programming unit continues to program the programmable fuse.

Abstract: A current-controlled ring oscillator uses a single controlled-current supply for supplying current to each inversion stage of the ring oscillator. The controlled current is dynamically adjusted to compensate for variations in process, voltage, or temperature conditions. A relatively simple circuit is used to generate the controlled current that supplies all of the inversion stages over a wide range of process, voltage, and temperature variations.

Abstract: An improved data receiver gain enhancement is obtained in circuit by having a V/I converter and an amplifier stage, by placing a passive filter between in converter and amplifier stage. Amplification of certain parts of the signal, more than other parts can be obtained, depending on the characteristics of the filter.

Abstract: An improved data receiver gain enhancement is obtained in circuit by having a V/I converter and an amplifier stage, by placing a passive filter between in converter and amplifier stage. Amplification of certain parts of the signal, more than other parts can be obtained, depending on the characteristics of the filter.

Abstract: A differential threshold comparator is provided which includes an input stage and a threshold stage, both supplied with current by a common current mirror. Both stages are differential comparators, with the input stage having terminals for receiving an input signals and the threshold stage having terminals for receiving a threshold voltage. The threshold comparator produces a signal which indicates whether the difference between input signal voltages exceeds the threshold voltage.

Abstract: A high-speed current switch has complementary switching stages for collectively producing a square-wave output current. Spurious currents and charging delays caused by intrinsic capacitances in one stage substantially cancel those in the other stage.