Abstract: A method for processing a low ohmic contact structure to a buried conductive layer in or below a device layer forming part of a semiconductor component is presented, whereby first a highly doped region within said device layer reaching said buried conductive layer is realised, this being followed by a step of etching a trench through said highly doped region to a final depth which extends at least to the semiconductor substrate underneath said buried conductive layer. In a variant method this trench is first pre-etched until a predetermined depth, before the highly doped region is provided. A semiconductor structure which is realised by these methods is described as well.

Abstract: A method for processing a low ohmic contact structure to a buried conductive layer in or below a device layer forming part of a semiconductor component is presented, whereby first a highly doped region within said device layer reaching said buried conductive layer is realised, this being followed by a step of etching a trench through said highly doped region to a final depth which extends at least to the semiconductor substrate underneath said buried conductive layer. In a variant method this trench is first pre-etched until a predetermined depth, before the highly doped region is provided.

Abstract: In a method for processing conductive layer structures in a four metal layer CMOS process, the step of depositing the third conductive layer (30) includes at least one succession of depositions of a light-absorbing layer (301;303) on top of a light-reflective layer (300;302), such that the total thickness of said third conductive layer (30) does not exceed 350 nm. Devices including these conductive layer structures, such as reflective type liquid crystal display devices as well as metal capacitor structures which are processed using the subject method are as well described.