Patents by Inventor Paul G. Shealy

Paul G. Shealy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Self-repairing of microprocessor array structures
    Patent number: 7694198
    Abstract: A level of indirection is utilized when writing to a microprocessor array structure, thereby masking hard faults in the array structure. Among other benefits, this minimizes the use of a backward error recovery mechanism with its inherent delay for recovery. The indirection is used to effectively remove from use faulty portions of the array structure and substitute spare, functioning portions to perform the duties of the faulty portions. Thus, for example, faulty rows in microprocessor array structures are mapped out in favor of substitute, functioning rows.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: April 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Fred A. Bower, III, Sule Ozev, Paul G. Shealy, Daniel J. Sorin
  • Self-Repairing Of Microprocessor Array Structures
    Publication number: 20090031169
    Abstract: A level of indirection is utilized when writing to a microprocessor array structure, thereby masking hard faults in the array structure. Among other benefits, this minimizes the use of a backward error recovery mechanism with its inherent delay for recovery. The indirection is used to effectively remove from use faulty portions of the array structure and substitute spare, functioning portions to perform the duties of the faulty portions. Thus, for example, faulty rows in microprocessor array structures are mapped out in favor of substitute, functioning rows.
    Type: Application
    Filed: June 12, 2008
    Publication date: January 29, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Fred A. Bower, III, Sule Ozev, Paul G. Shealy, Daniel J. Sorin
  • Self-repairing of microprocessor array structures
    Patent number: 7415644
    Abstract: A level of indirection is utilized when writing to a microprocessor array structure, thereby masking hard faults in the array structure. Among other benefits, this minimizes the use of a backward error recovery mechanism with its inherent delay for recovery. The indirection is used to effectively remove from use faulty portions of the array structure and substitute spare, functioning portions to perform the duties of the faulty portions. Thus, for example, faulty rows in microprocessor array structures are mapped out in favor of substitute, functioning rows.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: August 19, 2008
    Assignee: International Business Machines Corporation
    Inventors: Fred A. Bower, III, Sule Ozev, Paul G. Shealy, Daniel J. Sorin