Patents by Inventor Paul Glendenning
Paul Glendenning has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150046889Abstract: Embodiments of a system and method for generating an image configured to program a parallel machine from source code are disclosed. One such parallel machine includes a plurality of state machine elements (SMEs) grouped into pairs, such that SMEs in a pair have a common output. One such method includes converting source code into an automaton comprising a plurality of interconnected states, and converting the automaton into a netlist comprising instances corresponding to states in the automaton, wherein converting includes pairing states corresponding to pairs of SMEs based on the fact that SMEs in a pair have a common output. The netlist can be converted into the image and published.Type: ApplicationFiled: July 18, 2014Publication date: February 12, 2015Inventors: Junjuan Xu, Paul Glendenning
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Publication number: 20140380288Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general purpose element and a special purpose element. The compiler identifies a portion in an arrangement of relationally connected operators that corresponds to a special purpose element. The compiler also determines whether the portion meets a condition to be mapped to the special purpose element. The compiler also converts the arrangement into an automaton comprising a plurality of states, wherein the portion is converted using a special purpose state that corresponds to the special purpose element if the portion meets the condition. The compiler also converts the automaton into machine code. Additional apparatus, systems, and methods are disclosed.Type: ApplicationFiled: September 5, 2014Publication date: December 25, 2014Inventors: Junjuan Xu, Paul Glendenning
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Publication number: 20140353381Abstract: This inventive method assures the authenticity of drugs or other valuable substances that reside within product containers, such as syringes. The method includes initially measuring the 3D topology of the glass surface while determining the distance to the glass surface. Thereafter, a desired 3D code is written below the glass surface with a pulsed laser system. The written 3D code is readable using optical coherence topography (OCT) or parallel optical coherence tomography (pOCT) to verify the authenticity of the product container. A system uses this method with a plurality of syringes held within a tray, and a writing apparatus that moves relative to the tray to write a predetermined 3D code on each of the syringes held in the tray, during processing of the syringes along a process line while in the tray.Type: ApplicationFiled: June 18, 2012Publication date: December 4, 2014Applicant: I-PROPERTY HOLDING CORP.Inventors: Alexander Stuck, Stefan Klocke, Paul Glendenning
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Patent number: 8843911Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general purpose element and a special purpose element. The compiler identifies a portion in an arrangement of relationally connected operators that corresponds to a special purpose element. The compiler also determines whether the portion meets a condition to be mapped to the special purpose element. The compiler also converts the arrangement into an automaton comprising a plurality of states, wherein the portion is converted using a special purpose state that corresponds to the special purpose element if the portion meets the condition. The compiler also converts the automaton into machine code. Additional apparatus, systems, and methods are disclosed.Type: GrantFiled: January 24, 2012Date of Patent: September 23, 2014Assignee: Micron Technology, Inc.Inventors: Junjuan Xu, Paul Glendenning
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Publication number: 20140229926Abstract: Apparatus, systems, and methods for a compiler are disclosed. One such compiler parses a human readable expression into a syntax tree and converts the syntax tree into an automaton having in-transitions and out-transitions. Converting can include unrolling the quantification as a function of in-degree limitations wherein in-degree limitations includes a limit on the number of transitions into a state of the automaton. The compiler can also convert the automaton into an image for programming a parallel machine, and publishes the image. Additional apparatus, systems, and methods are disclosed.Type: ApplicationFiled: April 14, 2014Publication date: August 14, 2014Applicant: Micron Technology, Inc.Inventors: Junjuan Xu, Paul Glendenning
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Publication number: 20140229925Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler converts source code into an automaton comprising states and transitions between the states, wherein the states in the automaton include a special purpose state that corresponds to a special purpose hardware element. The compiler converts the automaton into a netlist, and places and routes the netlist to provide machine code for configuring a target device.Type: ApplicationFiled: April 14, 2014Publication date: August 14, 2014Applicant: Micron Technology, Inc.Inventors: Paul Glendenning, Junjuan Xu
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Publication number: 20140204956Abstract: A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.Type: ApplicationFiled: March 24, 2014Publication date: July 24, 2014Applicant: Micron Technology, Inc.Inventors: David R. Brown, Harold B. Noyes, Irene Junjuan Xu, Paul Glendenning
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Patent number: 8788991Abstract: Embodiments of a system and method for generating an image configured to program a parallel machine from source code are disclosed. One such parallel machine includes a plurality of state machine elements (SMEs) grouped into pairs, such that SMEs in a pair have a common output. One such method includes converting source code into an automaton comprising a plurality of interconnected states, and converting the automaton into a netlist comprising instances corresponding to states in the automaton, wherein converting includes pairing states corresponding to pairs of SMEs based on the fact that SMEs in a pair have a common output. The netlist can be converted into the image and published.Type: GrantFiled: January 24, 2012Date of Patent: July 22, 2014Assignee: Micron Technology, Inc.Inventors: Junjuan Xu, Paul Glendenning
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Patent number: 8726253Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler converts source code into an automaton comprising states and transitions between the states, wherein the states in the automaton include a special purpose state that corresponds to a special purpose hardware element. The compiler converts the automaton into a netlist, and places and routes the netlist to provide machine code for configuring a target device.Type: GrantFiled: January 24, 2012Date of Patent: May 13, 2014Assignee: Micron Technology, Inc.Inventors: Paul Glendenning, Junjuan Xu
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Patent number: 8726256Abstract: Apparatus, systems, and methods for a compiler are disclosed. One such compiler parses a human readable expression into a syntax tree and converts the syntax tree into an automaton having in-transitions and out-transitions. Converting can include unrolling the quantification as a function of in-degree limitations wherein in-degree limitations includes a limit on the number of transitions into a state of the automaton. The compiler can also convert the automaton into an image for programming a parallel machine, and publishes the image. Additional apparatus, systems, and methods are disclosed.Type: GrantFiled: January 24, 2012Date of Patent: May 13, 2014Assignee: Micron Technology, Inc.Inventors: Junjuan Xu, Paul Glendenning
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Publication number: 20140115299Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may include a counter suitable for counting a number of times a programmable element in the lattice detects a condition. The counter may be configured to output in response to counting the condition was detected a certain number of times. For example, the counter may be configured to output in response to determining a condition was detected at least (or no more than) the certain number of times, determining the condition was detected exactly the certain number of times, or determining the condition was detected within a certain range of times. The counter may be coupled to other counters in the device for determining high-count operations and/or certain quantifiers.Type: ApplicationFiled: December 30, 2013Publication date: April 24, 2014Applicant: Micron Technology, Inc.Inventors: Harold B Noyes, David R. Brown, Paul Glendenning
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Patent number: 8680888Abstract: A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.Type: GrantFiled: December 15, 2011Date of Patent: March 25, 2014Assignee: Micron Technologies, Inc.Inventors: David R. Brown, Harold B Noyes, Irene Junjuan Xu, Paul Glendenning
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Publication number: 20140077838Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.Type: ApplicationFiled: November 22, 2013Publication date: March 20, 2014Inventors: Harold B. Noyes, David R. Brown, Paul Glendenning, Irene Junjuan Xu
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Patent number: 8648621Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may include a counter suitable for counting a number of times a programmable element in the lattice detects a condition. The counter may be configured to output in response to counting the condition was detected a certain number of times. For example, the counter may be configured to output in response to determining a condition was detected at least (or no more than) the certain number of times, determining the condition was detected exactly the certain number of times, or determining the condition was detected within a certain range of times. The counter may be coupled to other counters in the device for determining high-count operations and/or certain quantifiers.Type: GrantFiled: December 15, 2011Date of Patent: February 11, 2014Assignee: Micron Technology, Inc.Inventors: Harold B Noyes, David R. Brown, Paul Glendenning
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Patent number: 8593175Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.Type: GrantFiled: December 15, 2011Date of Patent: November 26, 2013Assignee: Micron Technology, Inc.Inventors: Harold B Noyes, David R. Brown, Paul Glendenning, Irene Junjuan Xu
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Publication number: 20130156043Abstract: A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.Type: ApplicationFiled: December 15, 2011Publication date: June 20, 2013Applicant: Micron Technology, Inc.Inventors: David R. Brown, Harold B Noyes, Irene Junjuan Xu, Paul Glendenning
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Publication number: 20130159670Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may include a counter suitable for counting a number of times a programmable element in the lattice detects a condition. The counter may be configured to output in response to counting the condition was detected a certain number of times. For example, the counter may be configured to output in response to determining a condition was detected at least (or no more than) the certain number of times, determining the condition was detected exactly the certain number of times, or determining the condition was detected within a certain range of times. The counter may be coupled to other counters in the device for determining high-count operations and/or certain quantifiers.Type: ApplicationFiled: December 15, 2011Publication date: June 20, 2013Applicant: Micron Technology, Inc.Inventors: Harold B Noyes, David R. Brown, Paul Glendenning
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Publication number: 20130154685Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.Type: ApplicationFiled: December 15, 2011Publication date: June 20, 2013Applicant: Micron Technology, Inc.Inventors: Harold B Noyes, David R. Brown, Paul Glendenning, Irene J. Xu
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Publication number: 20120192165Abstract: Apparatus, systems, and methods for a compiler are disclosed. One such compiler parses a human readable expression into a syntax tree and converts the syntax tree into an automaton having in-transitions and out-transitions. Converting can include unrolling the quantification as a function of in-degree limitations wherein in-degree limitations includes a limit on the number of transitions into a state of the automaton. The compiler can also convert the automaton into an image for programming a parallel machine, and publishes the image. Additional apparatus, systems, and methods are disclosed.Type: ApplicationFiled: January 24, 2012Publication date: July 26, 2012Inventors: Junjuan Xu, Paul Glendenning
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Publication number: 20120192166Abstract: Embodiments of a system and method for generating an image configured to program a parallel machine from source code are disclosed. One such parallel machine includes a plurality of state machine elements (SMEs) grouped into pairs, such that SMEs in a pair have a common output. One such method includes converting source code into an automaton comprising a plurality of interconnected states, and converting the automaton into a netlist comprising instances corresponding to states in the automaton, wherein converting includes pairing states corresponding to pairs of SMEs based on the fact that SMEs in a pair have a common output. The netlist can be converted into the image and published.Type: ApplicationFiled: January 24, 2012Publication date: July 26, 2012Inventors: Junjuan Xu, Paul Glendenning