Patents by Inventor Paul H. Benson, IV

Paul H. Benson, IV has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5630142
    Abstract: A computer system having four states of power management: a normal operating state, a standby state, a suspend state, and an off state. A control unit controls transitions between the various states. The standby state is characterized by devices, such as a video controller and a hard drive, being placed into a low-power mode transparent to the operating system and the applications executing on the computer system. The suspend state is characterized by executing code being interrupted and the state of the computer system being saved to a file on the hard drive in such a manner that system power may be removed after the state of the computer system is saved to the hard drive. Later, after system power is restored, the state of the computer system is resumed by reading from the hard drive and loading it in such a manner that the operating system and application programs are not adversely affected.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: May 13, 1997
    Assignee: International Business Machines Corporation
    Inventors: Dwayne T. Crump, Steven T. Pancoast, Duane E. Norris, Paul H. Benson, IV
  • Patent number: 5603038
    Abstract: A computer system having a CPU, a non-volatile storage device, a power management processor having a volatile power management configuration, and a power supply in circuit communication. Responsive to the AC power to the power supply being interrupted, the CPU restores the volatile power management configuration to said power management processor. The power management configuration comprises a value corresponding to a wake alarm and whether the power management processor responds to external events.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: February 11, 1997
    Assignee: International Business Machines Corporation
    Inventors: Dwayne T. Crump, Steven T. Pancoast, Paul H. Benson, IV, Jeffrey S. Bartlett
  • Patent number: 5551043
    Abstract: A computer system having at least three states of power management: a normal operating state, a standby state, and a suspend state. The standby state is characterized by devices, such as a video controller and a hard drive, being placed into a low-power mode transparent to the operating system and the applications executing on the computer system. The suspend state is characterized by executing code being interrupted and the state of the computer system being saved to a file on the hard drive in such a manner that system power may be removed after the state of the computer system is saved to the hard drive. Later, after system power is restored, the state of the computer system is resumed by reading from the hard drive and loading it in such a manner that the operating system and application programs are not adversely affected.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: August 27, 1996
    Assignee: International Business Machines Corporation
    Inventors: Dwayne T. Crump, Steven T. Pancoast, Paul H. Benson, IV, Herbert S. Steelman
  • Patent number: 5530879
    Abstract: A computer system having a CPU, a power management processor, a switch, a modem, a timer, an override circuit, a glitch circuit, and a power supply in circuit communication. The power supply has several power supply states, which are controlled by the power management processor responsive to the CPU, the switch, the modem, the timer, the glitch circuit, the override circuit, and the power management processor itself.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: June 25, 1996
    Assignee: International Business Machines Corporation
    Inventors: Dwayne T. Crump, Steven T. Pancoast, Paul H. Benson, IV
  • Patent number: 5511204
    Abstract: A computer system having a CPU, a non-volatile storage device, a power management processor having a volatile power management configuration, and a power supply in circuit communication. The power management processor controls the regulation of power to the CPU by the power supply. Prior to causing the power supply to cease providing regulated power to the CPU, the power management processor interrupts the CPU via a system management interrupt. Responsive to being interrupted via the system management interrupt, the CPU performs tasks associated with the power supply imminently ceasing to provide regulated power to the CPU. Such tasks include writing data to non-volatile memory and refreshing an alarm value in the power management processor. The CPU can extend the period of time before the power management processor causes the power supply to cease providing regulated power to the CPU while the CPU performs the necessary tasks.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: April 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Dwayne T. Crump, Steven T. Pancoast, John M. Landry, Paul H. Benson, IV