Abstract: Racks and rack pods to support a plurality of sleds are disclosed herein. Switches for use in the rack pods are also disclosed herein. A rack comprises a plurality of sleds and a plurality of electromagnetic waveguides. The plurality of sleds are vertically spaced from one another. The plurality of electromagnetic waveguides communicate data signals between the plurality of sleds.

Abstract: Methods and apparatus relating to heterogeneous compute architecture hardware/software co-design for autonomous driving are described. In one embodiment, a heterogeneous compute architecture for autonomous driving systems (also interchangeably referred to herein as Heterogeneous Compute Architecture or “HCA” for short) integrates scalable heterogeneous processors, flexible networking, benchmarking tools, etc. to enable (e.g., system-level) designers to perform hardware and software co-design. With HCA system engineers can rapidly architect, benchmark, and/or evolve vehicle system architectures for autonomous driving. Other embodiments are also disclosed and claimed.

Abstract: Technologies for providing adaptive power management in an accelerator sled include an accelerator sled having circuitry to determine, based on (i) a total power budget for the accelerator sled, (ii) service level agreement (SLA) data indicative of a target performance of a kernel, and (iii) profile data indicative of a performance of the kernel as a function of a power utilization of the kernel, a power utilization limit for the kernel to be executed by an accelerator device on the accelerator sled. Additionally, the circuitry is to allocate the determined power utilization limit to the kernel and execute the kernel under the allocated power utilization limit.

Abstract: Racks and rack pods to support a plurality of sleds are disclosed herein. Switches for use in the rack pods are also disclosed herein. A rack comprises a plurality of sleds and a plurality of electromagnetic waveguides. The plurality of sleds are vertically spaced from one another. The plurality of electromagnetic waveguides communicate data signals between the plurality of sleds.

Abstract: Methods and apparatus relating to heterogeneous compute architecture hardware/software co-design for autonomous driving are described. In one embodiment, a heterogeneous compute architecture for autonomous driving systems (also interchangeably referred to herein as Heterogeneous Compute Architecture or “HCA” for short) integrates scalable heterogeneous processors, flexible networking, benchmarking tools, etc. to enable (e.g., system-level) designers to perform hardware and software co-design. With HCA system engineers can rapidly architect, benchmark, and/or evolve vehicle system architectures for autonomous driving. Other embodiments are also disclosed and claimed.

Abstract: Technologies for network interface controllers (NICs) include a computing device having a NIC coupled to a root FPGA via an I/O link. The root FPGA is further coupled to multiple worker FPGAs by a serial link with each worker FPGA. The NIC may receive a remote direct memory access (RDMA) message from a remote host and send the RDMA message to the root FPGA via the I/O link. The root FPGA determines a target FPGA based on a memory address of the RDMA message. Each FPGA is associated with a part of a unified address space. If the target FPGA is a worker FPGA, the root FPGA sends the RDMA message to the worker FPGA via the corresponding serial link, and the worker FPGA processes the RDMA message. If the root FPGA is the target, the root FPGA may process the RDMA message. Other embodiments are described and claimed.

Abstract: Technologies for facilitating remote memory requests in accelerator devices are disclosed. The accelerator device includes circuitry to receive, from a kernel of the present accelerator device, a request through an application programming interface exposed to a high level software language in which the kernel of the present accelerator device is implemented, to establish a logical communication path between the kernel of the present accelerator device and a target accelerator device kernel, based on one or more physical communication paths. The communication protocol supported by the accelerator device may allow kernels operating on the accelerator device to send memory requests for memory locations at remote devices, with the communication protocol performing all of the operations necessary to carry out the memory request.

Abstract: Technologies for facilitating remote memory requests in accelerator devices are disclosed. The accelerator device includes circuitry to receive, from a kernel of the present accelerator device, a request through an application programming interface exposed to a high level software language in which the kernel of the present accelerator device is implemented, to establish a logical communication path between the kernel of the present accelerator device and a target accelerator device kernel, based on one or more physical communication paths. The communication protocol supported by the accelerator device may allow kernels operating on the accelerator device to send memory requests for memory locations at remote devices, with the communication protocol performing all of the operations necessary to carry out the memory request.

Abstract: Technologies for managing accelerator resources in a computing environment include an orchestrator having circuitry. According to one embodiment, the circuitry is to monitor resource usage of an accelerator kernel configured on a source accelerator device. The circuitry is to determine whether the resource usage exceeds a threshold specified in one or more policies. Upon a determination that the resource usage exceeds the threshold, the circuitry is to identify a target accelerator device to which to migrate the accelerator kernel. The circuitry migrates the accelerator kernel from the source accelerator device to the target accelerator device.

Abstract: Technologies for providing inter-kernel communication abstraction to support scale-up and scale-out include an accelerator device. The accelerator device includes circuitry to receive, from a kernel of the present accelerator device, a request through an application programming interface exposed to a high level software language in which the kernel of the present accelerator device is implemented, to establish a logical communication path between the kernel of the present accelerator device and a target accelerator device kernel, based on one or more physical communication paths. Additionally, the circuitry is to establish, in response to the request, the logical communication path between the kernel of the present accelerator device and the other accelerator device kernel and communicate data between the kernel of the present accelerator device and the other accelerator device kernel with a unified communication protocol that manages differences between the physical communication paths.

Abstract: Technologies for providing adaptive power management in an accelerator sled include an accelerator sled having circuitry to determine, based on (i) a total power budget for the accelerator sled, (ii) service level agreement (SLA) data indicative of a target performance of a kernel, and (iii) profile data indicative of a performance of the kernel as a function of a power utilization of the kernel, a power utilization limit for the kernel to be executed by an accelerator device on the accelerator sled. Additionally, the circuitry is to allocate the determined power utilization limit to the kernel and execute the kernel under the allocated power utilization limit.

Abstract: Technologies for network interface controllers (NICs) include a computing device having a NIC coupled to a root FPGA via an I/O link. The root FPGA is further coupled to multiple worker FPGAs by a serial link with each worker FPGA. The NIC may receive a remote direct memory access (RDMA) message from a remote host and send the RDMA message to the root FPGA via the I/O link. The root FPGA determines a target FPGA based on a memory address of the RDMA message. Each FPGA is associated with a part of a unified address space. If the target FPGA is a worker FPGA, the root FPGA sends the RDMA message to the worker FPGA via the corresponding serial link, and the worker FPGA processes the RDMA message. If the root FPGA is the target, the root FPGA may process the RDMA message. Other embodiments are described and claimed.

Abstract: Racks and rack pods to support a plurality of sleds are disclosed herein. Switches for use in the rack pods are also disclosed herein. A rack comprises a plurality of sleds and a plurality of electromagnetic waveguides. The plurality of sleds are vertically spaced from one another. The plurality of electromagnetic waveguides communicate data signals between the plurality of sleds.

Abstract: Technologies for providing efficient access to pooled accelerator devices include an accelerator sled. The accelerator sled includes an accelerator device and a controller connected to the accelerator device. The controller is to provide, to a compute sled, accelerator abstraction data. The accelerator abstraction data represents the accelerator device as one or more logical devices, each logical device having one or more memory regions accessible by the compute sled, and defines an access mode usable to access each corresponding memory region. The controller is further to receive, from the compute sled, a request to perform an operation on an identified memory region of the accelerator device with a corresponding access mode. Additionally, the controller is to convert the request from a first format to a second format that is different from the second format and is usable by the accelerator device to perform the operation.

Abstract: Methods and apparatus relating to heterogeneous compute architecture hardware/software co-design for autonomous driving are described. In one embodiment, a heterogeneous compute architecture for autonomous driving systems (also interchangeably referred to herein as Heterogeneous Compute Architecture or “HCA” for short) integrates scalable heterogeneous processors, flexible networking, benchmarking tools, etc. to enable (e.g., system-level) designers to perform hardware and software co-design. With HCA system engineers can rapidly architect, benchmark, and/or evolve vehicle system architectures for autonomous driving. Other embodiments are also disclosed and claimed.

Abstract: Technologies for virtual multipath access include a computing device configured to sequester a recovery partition from a host partition while allowing the recovery partition to access one or more resources of the host partition such as host memory or data storage. A remote computing device determines whether the host partition is responsive. The recovery partition receives a request for host state data of the host partition from the remote computing device in response to a determination that the host partition is not responsive. The recovery partition retrieves the requested host state data using a host state index maintained by the host partition and transmits the requested host state data to the remote computing device. The host state index may identify the location of the requested host state data. The remote computing device may perform a recovery operation based on the received host state data. Other embodiments are described and claimed.

Abstract: Technologies for virtual multipath access include a computing device configured to sequester a recovery partition from a host partition while allowing the recovery partition to access one or more resources of the host partition such as host memory or data storage. A remote computing device determines whether the host partition is responsive. The recovery partition receives a request for host state data of the host partition from the remote computing device in response to a determination that the host partition is not responsive. The recovery partition retrieves the requested host state data using a host state index maintained by the host partition and transmits the requested host state data to the remote computing device. The host state index may identify the location of the requested host state data. The remote computing device may perform a recovery operation based on the received host state data. Other embodiments are described and claimed.

Abstract: A method and system for displaying information on an electronic paper (or “e-paper”) is included herein. The method includes passing the e-paper through an e-paper printer. Additionally, the method includes changing a status of a pixel on the e-paper.

Abstract: A method and system for displaying information on an electronic paper (or “e-paper”) is included herein. The method includes passing the e-paper through an e-paper printer. Additionally, the method includes changing a status of a pixel on the e-paper.

Abstract: A system and process for directly and flexibly switching connections of data packet flows between nodes of a broadband data processing system network. The system acts as a single IP switch.