Patents by Inventor Paul Hendrik Cappon

Paul Hendrik Cappon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Level shifter with ESD protection
    Patent number: 11251782
    Abstract: As disclosed herein, a level shift circuit includes devices that are responsive to an ESD signal for placing those devices in a specific condition in response to the ESD signal indicating an ESD event. In some embodiments, the devices are transistors in current paths that are placed in a condition such that during an ESD event, voltage differentials in the current paths across voltage domain boundaries do not damage the circuitry of the level shift circuit. In some embodiments, some of the same devices that are responsive to the ESD event are also responsive to a signal to that detects the absence of a power supply voltage of one of the domains and places those devices in a condition to disable the level shift circuit if the power supply voltage is not present.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: February 15, 2022
    Assignee: NXP B.V.
    Inventors: Marcin Grad, Paul Hendrik Cappon, Kiran B. Gopal, Taede Smedes
  • Snapback clamps for ESD protection with voltage limited, centralized triggering scheme
    Patent number: 11056879
    Abstract: An apparatus for electrostatic discharge protection. In one embodiment, an integrated circuit (IC) includes a trigger circuit configured to generate a trigger voltage VT in response to an electrostatic discharge (ESD) event. A plurality of metal oxide semiconductor (MOS) transistors are coupled to the trigger circuit. The plurality of MOS transistors are configured to conduct ESD current from a plurality of circuit nodes, respectively, to a ground conductor in response to the trigger circuit generating the trigger voltage VT. A voltage limiter circuit is also included and is configured to limit the trigger voltage VT.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: July 6, 2021
    Assignee: NXP USA, Inc.
    Inventors: Michael A. Stockinger, Marcin Grad, Paul Hendrik Cappon, Sjoerd Bruinsma
  • SNAPBACK CLAMPS FOR ESD PROTECTION WITH VOLTAGE LIMITED, CENTRALIZED TRIGGERING SCHEME
    Publication number: 20200395751
    Abstract: An apparatus for electrostatic discharge protection. In one embodiment, an integrated circuit (IC) includes a trigger circuit configured to generate a trigger voltage VT in response to an electrostatic discharge (ESD) event. A plurality of metal oxide semiconductor (MOS) transistors are coupled to the trigger circuit. The plurality of MOS transistors are configured to conduct ESD current from a plurality of circuit nodes, respectively, to a ground conductor in response to the trigger circuit generating the trigger voltage VT. A voltage limiter circuit is also included and is configured to limit the trigger voltage VT.
    Type: Application
    Filed: June 12, 2019
    Publication date: December 17, 2020
    Inventors: Michael A. Stockinger, Marcin Grad, Paul Hendrik Cappon, Sjoerd Bruinsma