Abstract: A process includes receiving an associated input signal via a receiver electrode of a sensor array, the associated input signal indicative of an associated mutual capacitance of the receiver electrode; adding a balancing signal to the associated input signal to generate a balanced input signal at least partially responsive to a number of sensor nodes at the receiver electrode; generating a voltage signal indicative of the associated mutual capacitance of the receiver electrode at least partially responsive to a balanced input signal; and generating a digital value representative of the voltage signal.

Abstract: A process includes receiving an associated input signal via a receiver electrode of a sensor array, the associated input signal indicative of an associated mutual capacitance of the receiver electrode; adding a balancing signal to the associated input signal to generate a balanced input signal at least partially responsive to a number of sensor nodes at the receiver electrode; generating a voltage signal indicative of the associated mutual capacitance of the receiver electrode at least partially responsive to a balanced input signal; and generating a digital value representative of the voltage signal.

Abstract: In one embodiment, a method comprises detecting, by a hardware accelerator, that a value has been written to a first location of a memory, the first location identified by a first address. The method further includes adding the value to an accumulated value stored in an accumulator register of the hardware accelerator and storing the result in the accumulator register. The method further includes comparing the value to a maximum value stored in a first register of the hardware accelerator and overwriting the maximum value with the value if the value is greater than the maximum value. The method also includes comparing the value to a minimum value stored in a second register of the hardware accelerator and overwriting the minimum value with the value if the value is less than the minimum value.

Abstract: In one embodiment, a method comprises detecting, by a hardware accelerator, that a value has been written to a first location of a memory, the first location identified by a first address. The method further includes adding the value to an accumulated value stored in an accumulator register of the hardware accelerator and storing the result in the accumulator register. The method further includes comparing the value to a maximum value stored in a first register of the hardware accelerator and overwriting the maximum value with the value if the value is greater than the maximum value. The method also includes comparing the value to a minimum value stored in a second register of the hardware accelerator and overwriting the minimum value with the value if the value is less than the minimum value.