Abstract: An output block for an in-system programmable analog integrated circuit. The output block features an output amplifier that accepts a differential current-mode input signal and provides a single-ended output voltage. The output amplifier is also selectably operable as a linear amplifier, an integrator or a comparator. The output block also includes a common-mode feedback circuit (CMFB), an analog trim circuit (OATRM), a CLAMP circuit, and an offset calibration circuit (CLDAC), all coupled to the differential input of the output amplifier. The CMFB exhibits bandwidth comparable to that of the output amplifier and a drive capability that enables the differential-input to single-ended output conversion. The CLAMP is connected to the differential input in the comparator mode in order to avoid slow recovery from an overdrive condition. The OATRM forces a difference current into the differential input that compensates for a (gain independent) offset voltage that results from various mismatches.

Abstract: The inventive level shifting circuit shifts an analog input signal by a precise amount. This allows it to be used in precision instrumentation applications where precise signal shifts are critical. It uses a self-biasing feedback circuit to determine the bias current needed to shift an analog signal by a desired amount. The circuit automatically compensates for influences by temperature, supply voltage, and process variations. This circuit also has value as a stand-alone function for other (non-programmable) products.

Abstract: An improved programmable transconductor can be efficiently implemented utilizing a programmable resistor circuit that allows for only a selected portion of the resistor circuit (associated with a desired transconductor gain) to be coupled between summing nodes of the transconductor. Additional switching circuits can be used to reduce gain errors associated with the switches used to implement the aforementioned solution. Additionally, the improved programmable transconductor can be integrated into fully differential programmable analog integrated circuits, thereby enhancing the performance of such integrated circuits.

Abstract: A charge pump circuit operates from a voltage provided on an input rail at a first potential relative to a reference potential rail and that provides second and third potentials relative to the reference potential rail on first and second output rails, respectively. The charge pump circuit includes first, second and third charge reservoir capacitors, an oscillator and control logic circuit for providing timing control signals, and a switch network responsive to the timing control signals for coupling the first, second and third capacitors in a plurality of configurations.

Abstract: A charge pump circuit operates from a voltage provided on an input rail at a first potential relative to a reference potential rail and that provides second and third potentials relative to the reference potential rail on first and second output rails, respectively. The charge pump circuit includes first, second and third charge reservoir capacitors, an oscillator and control logic circuit for providing timing control signals, and a switch network responsive to the timing control signals for coupling the first, second and third capacitors in a plurality of configurations. The switch network also provides for the decoupling of the capacitors from between the input rail and the reference potential rail between transitions of these configurations.