Abstract: A computer system includes a quantum computer, a classical co-processor and an interface that transmits at least part of at least one problem between the quantum computer and the classical co-processor. A digital computer may be coupled to the quantum computer and classical co-processor. Problems may be decomposed for solution by the quantum computer and co-processor based on computational efficiency.

Abstract: A coupling system to couple a first and a second qubit in response to a state of the coupling system that may be set by two input signals.

Abstract: Systems, methods and apparatus for a scalable quantum processor architecture. A quantum processor is locally programmable by providing a memory register with a signal embodying device control parameter(s), converting the signal to an analog signal; and administering the analog signal to one or more programmable devices.

Abstract: Superconductor technology and Batcher banyan switching technology are combined and implemented as a practical component in a single cryo-MCM substrate (10) containing a plurality of superconductor chips (37, 38, 39, 41, 42, 43, 44, 46, 48, 49, 51, 53 and 55) arranged in a plurality of rows and columns. Wiring (52) on the substrate connects the chips in each row of a number of the columns (41, 43, 45, 47, 49, 51 & 53) serially to collectively define a Batcher sorter. Other wiring (52) connects the chips in each row of a number of other columns (40, 42, 44 & 48) in reverse banyan and banyan networks. The foregoing includes a novel superconductor Batcher two-bit serial sorter (FIG. 8) and trap (FIG. k9).