Patents by Inventor Paul Il Estrada

Paul Il Estrada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6885983
    Abstract: A programmed computer searches for functional defects in a description of a circuit undergoing functional verification in the following manner. The programmed computer simulates the functional behavior of the circuit in response to a test vector, automatically restores the state of the simulation without causing the simulation to pass through a reset state, and then simulates the functional behavior of the circuit in response to another test vector. A predetermined rule can be used to identify test vectors to be simulated, and the predetermined rule can depend upon a measure of functional verification, including the number of times during simulation when a first state transition is performed by a first controller at the same time as a second state transition is performed by a second controller. During simulation of the test vectors, manually generated tests or automatically generated checkers can monitor portions of the circuit for defective behavior.
    Type: Grant
    Filed: May 4, 2001
    Date of Patent: April 26, 2005
    Assignee: Mentor Graphics Corporation
    Inventors: Chian-Min Richard Ho, Robert Kristianto Mardjuki, David Lansing Dill, Jing Chyuarn Lin, Ping Fai Yeung, Paul Il Estrada, Jean-Charles Giomi, Tai An Ly, Kalyana C. Mulam, Lawrence Curtis Widdoes, Jr., Paul Andrew Wilcox