Abstract: A method for providing security for plaintext data being transferred between units in a computer system includes steps of dividing a memory into a series of addressable locations, each of the addressable locations having an address at which can be stored version information, a data authentication tag, and ciphertext corresponding to the plaintext. The system retrieves the ciphertext, the version information, and the data authentication tag, and generates encryption keys for decrypting the information stored at the address. If the data authentication tag indicates the plaintext data are valid, then the system provides the decrypted plaintext to the requestor, or encrypts new plaintext data and stores the corresponding ciphertext with new authentication and version information at the first address.

Abstract: A system for providing high security for data stored in memories in computer systems is disclosed. A different encryption key is used for every memory location, and a write counter hides rewriting of the same data to a given location. As a result, the data for every read or write transaction between the microprocessor and the memory is encrypted differently for each transaction for each address, thereby providing a high level of security for the data stored.

Abstract: A system for providing high security for data stored in memories in computer systems is disclosed. A different encryption key is used for every memory location, and a write counter hides rewriting of the same data to a given location. As a result, the data for every read or write transaction between the microprocessor and the memory is encrypted differently for each transaction for each address, thereby providing a high level of security for the data stored.

Abstract: A computer system is adapted to transfer write data from a central processing unit to one of a plurality of memory modules in a memory array by transferring a block of write data to a memory control logic device. The memory control logic device transfers the block of data in a plurality of data bursts interspaced by a preselected number of bus cycles. During the interspaced preselected number of bus cycles, the memory control logic device sends pending read commands to an available memory module thereby overlapping read and write operations on the memory bus, thus, lowering memory read latency.

Abstract: A digital copier and method of processing images in which the images are manipulated and processed utilizing smaller blocks of the image. By working with smaller blocks, the image processing may begin before an entire image is scanned or before the entire image is loaded into a memory or buffer. Further, when printing, the start of the printing process may begin as soon as a row of the smaller blocks is completed without waiting for the generation of the entire manipulated image. The blocks are preferably an integral multiple of the size of a size of a direct memory access buffer, or alternatively, are of a size which may be divided into the size of the direct memory access buffer an integral number of times or are a multiple of the size of the direct memory access buffer.

Abstract: A digital copier and method of processing images in which the images are manipulated and processed utilizing smaller blocks of the image. By working with smaller blocks, the image processing may begin before an entire image is scanned or before the entire image is loaded into a memory or buffer. Further, when printing, the start of the printing process may begin as soon as a row of the smaller blocks is completed without waiting for the generation of the entire manipulated image. The blocks are preferably an integral multiple of the size of a size of a direct memory access buffer, or alternatively, are of a size which may be divided into the size of the direct memory access buffer an integral number of times or are a multiple of the size of the direct memory access buffer.

Abstract: A digital copier and method of processing images in which the images are manipulated and processed utilizing smaller blocks of the image. By working with smaller blocks, the image processing may begin before an entire image is scanned or before the entire image is loaded into a memory or buffer. Further, when printing, the start of the printing process may begin as soon as a row of the smaller blocks is completed without waiting for the generation of the entire manipulated image. The blocks are preferably an integral multiple of the size of a size of a direct memory access buffer, or alternatively, are of a size which may be divided into the size of the direct memory access buffer an integral number of times or are a multiple of the size of the direct memory access buffer.

Abstract: A digital copier and method of processing images in which the images are manipulated and processed utilizing smaller blocks of the image. By working with smaller blocks, the image processing may begin before an entire image is scanned or before the entire image is loaded into a memory or buffer. Further, when printing, the start of the printing process may begin as soon as a row of the smaller blocks is completed without waiting for the generation of the entire manipulated image. The blocks are preferably an integral multiple of the size of a size of a direct memory access buffer, or alternatively, are of a size which may be divided into the size of the direct memory access buffer an integral number of times or are a multiple of the size of the direct memory access buffer.

Abstract: A digital copier and method of processing images in which the images are manipulated and processed utilizing smaller blocks of the image. By working with smaller blocks, the image processing may begin before an entire image is scanned or before the entire image is loaded into a memory or buffer. Further, when printing, the start of the printing process may begin as soon as a row of the smaller blocks is completed without waiting for the generation of the entire manipulated image. The blocks are preferably an integral multiple of the size of a size of a direct memory access buffer, or alternatively, are of a size which may be divided into the size of the direct memory access buffer an integral number of times or are a multiple of the size of the direct memory access buffer.

Abstract: A digital copier and method of processing images in which the images are manipulated and processed utilizing smaller blocks of the image. By working with smaller blocks, the image processing may begin before an entire image is scanned or before the entire image is loaded into a memory or buffer. Further, when printing, the start of the printing process may begin as soon as a row of the smaller blocks is completed without waiting for the generation of the entire manipulated image. The blocks are preferably an integral multiple of the size of a size of a direct memory access buffer, or alternatively, are of a size which may be divided into the size of the direct memory access buffer an integral number of times or are a multiple of the size of the direct memory access buffer.

Abstract: The bandwidth of a first bus and a second bus, unequal due to differences in protocol overheads and cycle times between the buses, are equalized without sacrificing any bandwidth on the lower bandwidth bus and without introducing any buffering in a control logic device. The control logic device equalizes the bandwidths of the buses by instructing a device coupled to the second bus to insert a partial dead bus cycle in a read transmission thereby dynamically adjusting read timing on the second bus when the second bus is heavily loaded.