Abstract: An RF quadrature signal generator (320, 370) is configured to receive a clock signal that is buffered by input buffer (404) and then coupled to a frequency divider (412) to produce a divided signal. The divided signal is coupled to a phase shift network (420) to generate a pulse train-pair wherein the two pulse trains of the pulse train-pair are in phase quadrature with one another. Limiting amplifiers (432 and 436) limit the amplitude of the pulse train-pair before they are coupled to a phase determining circuit (460) to generate a control signal representative of the relative phase difference between the amplitude limited pulse train-pair. The control signal is filtered and coupled to an op-amp integrator (474) to produce a feedback signal that is coupled to the phase shift network (420) in order to maintain the amplitude limited pulse train-pair in phase quadrature.