Patents by Inventor Paul Joseph LeBlanc

Paul Joseph LeBlanc has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems, methods, and apparatus to synchronize data bus access
    Patent number: 10698857
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to synchronize data bus access. An example system includes a first computing device to transmit a first synchronization pulse to second computing devices using a first bus, the first synchronization pulse to synchronize first timers of the second computing devices to trigger a data schedule including one or more data cycles, and transmit a second synchronization pulse to the second computing devices using the first bus, the second synchronization pulse to synchronize ones of the first timers and slot counters of the second computing devices to trigger the one or more data cycles. The example system further includes the second computing devices to transmit data to the first computing device using a second bus during the one or more data cycles, where each of the one or more data cycles is assigned to a corresponding one of the second computing devices.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: June 30, 2020
    Assignee: BRISTOL, INC
    Inventors: William Hoff, Paul Joseph LeBlanc, Fred DiNicola
  • SYSTEMS, METHODS, AND APPARATUS TO SYNCHRONIZE DATA BUS ACCESS
    Publication number: 20200104273
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to synchronize data bus access. An example system includes a first computing device to transmit a first synchronization pulse to second computing devices using a first bus, the first synchronization pulse to synchronize first timers of the second computing devices to trigger a data schedule including one or more data cycles, and transmit a second synchronization pulse to the second computing devices using the first bus, the second synchronization pulse to synchronize ones of the first timers and slot counters of the second computing devices to trigger the one or more data cycles. The example system further includes the second computing devices to transmit data to the first computing device using a second bus during the one or more data cycles, where each of the one or more data cycles is assigned to a corresponding one of the second computing devices.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 2, 2020
    Inventors: William Hoff, Paul Joseph LeBlanc, Fred DiNicola