Patents by Inventor Paul Kasulke
Paul Kasulke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7829817Abstract: In a basic variant of a soldering device whereby a laser device is used for melting solder material (3), a protective device is provided which protects the laser lens system (22) from suctioned liquid solder material. Protection of the laser lens system can be achieved by a transverse flow from an inlet channel (23) into an outlet channel (24) and/or by a diaphragm (39) arranged in front of the laser lens system.Type: GrantFiled: October 2, 2001Date of Patent: November 9, 2010Assignee: Pac Tech-Packaging Technologies GmbHInventors: Elke Zakel, Paul Kasulke, Oliver Uebel, Lars Titerle
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Patent number: 7121449Abstract: In order to apply solder material (20) to a workpiece (1), compressed gas is guided through a bore hole (5) of a capillary (3). A pressure sensor (13) situated in the bore hole (5) measures the dynamic pressure of the compressed gas. As soon as the tip (12) of the capillary approaches the workpiece (1), the dynamic pressure increases and is used as a measure for the distance between the tip (12) of the capillary (3) and the workpiece (1), enabling the feed motion of the capillary to be controlled.Type: GrantFiled: October 2, 2001Date of Patent: October 17, 2006Assignee: Pac Tec - Packaging Technologies GmbHInventors: Elke Zakel, Paul Kasulke, Oliver Uebel, Lars Titerle
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Patent number: 7087442Abstract: Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged transverse to the longitudinal extent of the carrier substrate.Type: GrantFiled: September 24, 2001Date of Patent: August 8, 2006Assignee: Pac Tech-Packaging Technologies GmbHInventors: Hans-Hermann Oppermann, Elke Zakel, Ghassem Azdasht, Paul Kasulke
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Patent number: 7021517Abstract: The invention relates to a device for applying pieces of material to a workpiece. Said device comprises a plurality of capillaries which respectively bring a piece of material (6) to a work station (3) in one working cycle. The piece of material is placed on the work station. A filling station fills a circular conveyer with a number of pieces of material (6) corresponding to the number of capillaries (4). An extracting station (19) is arranged in the transport path from the filling station (18) to the machining station (4?), said extracting station (19) extracting individual fragments of material (6) in a selective manner.Type: GrantFiled: October 2, 2001Date of Patent: April 4, 2006Assignee: Pac Tec - Packaging Technologies GmbHInventors: Elke Zakel, Paul Kasulke, Oliver Uebel, Lars Titerle
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Patent number: 6955284Abstract: The device for positioning a tool (1) in relation to a workpiece (6) controls drives (2, 3, 4) in relation to three spatial axes (x, y, z) through two cameras (10, 11), the first (1) of which takes an image essentially along a spatial axis (y), the other (11) being oriented essentially vertically with respect to a surface (8) of the workpiece.Type: GrantFiled: October 2, 2001Date of Patent: October 18, 2005Assignee: Pac Tec-Packaging Technologies GmbHInventors: Elke Zakel, Paul Kasulke, Oliver Uebel, Lars Titerle
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Publication number: 20050031776Abstract: In order to apply solder material (20) to a workpiece (1), compressed gas is guided through a bore hole (5) of a capillary (3). A pressure sensor (13) situated in the bore hole (5) measures the dynamic pressure of the compressed gas. As soon as the tip (12) of the capillary approaches the workpiece (1), the dynamic pressure increases and is used as a measure for the distance between the tip (12) of the capillary (3) and the workpiece (1), enabling the feed motion of the capillary to be controlled.Type: ApplicationFiled: October 2, 2001Publication date: February 10, 2005Inventors: Elke Zakel, Paul Kasulke, Oliver Uebel, Lars Titerle
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Publication number: 20040129756Abstract: The device for positioning a tool (1) in relation to a workpiece (6) controls drives (2, 3, 4) in relation to three spatial axes (x, y, z) through two cameras (10, 11), the first (1) of which takes an image essentially along a spatial axis (y), the other (11) being oriented essentially vertically with respect to a surface (8) of the workpiece.Type: ApplicationFiled: June 20, 2003Publication date: July 8, 2004Inventors: Elke Zakel, Paul Kasulke, Oliver Uebel, Lars Titerle
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Publication number: 20040026383Abstract: In a basic variant of a soldering device whereby a laser device is used for melting solder material (3), a protective device is provided which protects the laser lens system (22) from suctioned liquid solder material.Type: ApplicationFiled: August 4, 2003Publication date: February 12, 2004Inventors: Elke Zakel, Paul Kasulke, Oliver Uebel, Lars Titerle
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Patent number: 6651891Abstract: The present invention relates to a method of producing a contactless chip card. In a first step of the method, a card body with one or a plurality of recesses on one card body side is produced from a theremoplastic material, preferably by injection moulding. Bumps being formed on the base surface of the recesses. Subsequently, conductor tracks corresponding to a coil as a conductor track pattern are impressed directly onto surface areas of the card body side including the recesses using a hot impressing technique. The conductor tracks are impressed especially also onto surface areas inside the recesses such that same extends across the bumps. One or a plurality of chips are then aligned in the recesses and contacted with the conductor tracks in the recesses which extend across the bumps. The method according to the present invention is advantageous insofar as it permits a simple production of a chip card, which requires only a few method steps and is therefore also economical.Type: GrantFiled: June 28, 2000Date of Patent: November 25, 2003Assignees: Smart Pac GmbH - Technology ServicesInventors: Elke Zakel, Rolf Aschenbrenner, Frank Ansorge, Paul Kasulke
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Publication number: 20020009828Abstract: Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged transverse to the longitudinal extent of the carrier substrate.Type: ApplicationFiled: September 24, 2001Publication date: January 24, 2002Applicant: PAC TECH - PACKAGING TECHNOLOGIES GMBHInventors: Hans-Hermann Oppermann, Elke Zakel, Ghassem Azdasht, Paul Kasulke
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Patent number: 6328200Abstract: Process for the selective formation of contact metallisations on terminal areas of a substrate, wherein the surface of the substrate is covered with a template in such a way that template openings forming deposit spaces are arranged above the terminal areas, and wherein the deposit spaces are filled with a solder material, and fusing of the solder material is effected with a view to forming the contact metallisations in the deposit spaces which are non-wettable at least in regions of contact with the solder material.Type: GrantFiled: February 26, 1999Date of Patent: December 11, 2001Assignee: PAC Tech - Packaging Technologies GmbHInventors: Jürgen Schredl, Paul Kasulke
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Patent number: 6281577Abstract: Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged either transverse to the longitudinal extent of the carrier substrate or parallel to the longitudinal extent of the flexibly constructed carrier substrate, as well as a spatial chip arrangement that is formed by means of this process.Type: GrantFiled: April 22, 1997Date of Patent: August 28, 2001Assignee: PAC Tech-Packaging Technologies GmbHInventors: Hans-Hermann Oppermann, Elke Zakel, Ghassem Azdasht, Paul Kasulke
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Patent number: 6277660Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).Type: GrantFiled: February 3, 2000Date of Patent: August 21, 2001Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.Inventors: Elke Zakel, Frank Ansorge, Paul Kasulke, Andreas Ostmann, Rolf Aschenbrenner, Lothar Dietrich
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Patent number: 6211571Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).Type: GrantFiled: September 6, 1996Date of Patent: April 3, 2001Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten ForschungInventors: Elke Zakel, Frank Ansorge, Paul Kasulke, Andreas Ostmann, Rolf Aschenbrenner, Lothar Dietrich
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Patent number: 6119919Abstract: Method for repairing defective soldered joints, in which in a first method step a soldering material handling device is placed with a soldering material removal device at a soldering material defect point and a defective soldering material deposit is loosened from the connection with a soldering material carrier and removed, and in which in a second method step a soldering material unit from a soldering material application device of the soldering material handling device is applied to the soldering material carrier and connected to the soldering material carrier, the application device being placed at the soldering material defect point.Type: GrantFiled: December 9, 1999Date of Patent: September 19, 2000Assignee: Pac Tech - Packaging Technologies GmbHInventor: Paul Kasulke
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Patent number: 6093971Abstract: Chip module (20) with a chip carrier (21) and at least one chip (22), wherein the chip carrier is designed as a sheet with a carrier layer (23) of plastics material and a conductor path structure (24) with conductor paths (28), and the chip carrier is connected to the chip with interposition of a filling material (37), wherein the conductor paths are connected on their front to attachment faces (32) of the chip and, on their rear side (27), have external bonding regions (26) for forming a flatly distributed attachment face arrangement (34) for the connection of the chip module to an electronic component or a substrate (31), and the conductor paths (28) extend in a plane on the chip bonding side (35) of the carrier layer (23) facing the chip (22), the external bonding regions (26) are formed by recesses in the carrier layer (23) which extend toward the rear side (27) of the conductor paths (28) and the carrier layer (23) extends over the region of the attachment faces (30) of the chip.Type: GrantFiled: May 2, 1997Date of Patent: July 25, 2000Assignee: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung e.V.Inventors: Hans-Hermann Oppermann, Elke Zakel, Ghassem Azdasht, Paul Kasulke
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Patent number: 6056188Abstract: A method of attaching an electronic component to a surface of a plate-shaped support member has as a first step the step of applying the electronic component to the surface of the support member, a solder being arranged between the electronic component and the support member. Following this, a glass fiber or a glass fiber bundle is applied to the surface of the plate-shaped support member located opposite the electronic component. Finally, a laser pulse is conducted through the glass fiber or glass fiber bundle for melting the solder so as to establish a punctiform electrical and mechanical connection between the support member and the electronic component in this way.Type: GrantFiled: May 12, 1998Date of Patent: May 2, 2000Assignee: Pac Tech-Packaging Technologies GmbHInventors: Ghassem Azdasht, Paul Kasulke
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Patent number: 6043985Abstract: A connecting structure (23) for establishing a thermal connection between at lest two components (21, 22) composed of materials with different expansion coefficients, wherein at least one component forms an electronic power element (21) and higher-melting-point materials are used for the contacting, which higher-melting-point materials form isolated connecting elements (29) between the contact surfaces (27, 28) of the components (21, 22).Type: GrantFiled: November 7, 1997Date of Patent: March 28, 2000Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.Inventors: Ghassem Azdasht, Paul Kasulke, Habib Badrihafifekr, Stefan Weiss, Elke Zakel
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Patent number: 5989993Abstract: Method for the preparation of electrodeposited or galvanically deposited bumps for the bonding of integrated circuits, characterized by two subsequent metal depositions, deposited without an external current source (chemical metal deposition) on a metallization 1, the first deposition being thicker than the second and the second deposition being more even or more regular throughout a large area than the first one.Type: GrantFiled: April 22, 1996Date of Patent: November 23, 1999Assignees: Elke Zakel, Pac Tech Packaging Technologies, GmbHInventors: Elke Zakel, Rolf Aschenbrenner, Andreas Ostmann, Paul Kasulke