Abstract: A method includes capturing an image of the pattern using one or more scans across a surface of the partially completed wafer. The method includes processing information associated with the captured image of the pattern in a first format (e.g., pixel domain) into a second format, e.g., transform domain. The method includes determining defect information associated with the image of the pattern in the second format and processing the defect information (e.g., wafer identification, product identification, layer information, x-y die scanned) to identify at least one defect associated with a spatial location of a repeating pattern on the partially completed wafer provided by a reticle. The method includes identifying the reticle associated with the defect and a stepper associated with the reticle having the defect and ceasing operation of the stepper. The damaged reticle is replaced, and the process resumes using a replaced reticle.

Abstract: A method includes capturing an image of the pattern using one or more scans across a surface of the partially completed wafer. The method includes processing information associated with the captured image of the pattern in a first format (e.g., pixel domain) into a second format, e.g., transform domain. The method includes determining defect information associated with the image of the pattern in the second format and processing the defect information (e.g., wafer identification, product identification, layer information, x-y die scanned) to identify at least one defect associated with a spatial location of a repeating pattern on the partially completed wafer provided by a reticle. The method includes identifying the reticle associated with the defect and a stepper associated with the reticle having the defect and ceasing operation of the stepper. The damaged reticle is replaced, and the process resumes using a replaced reticle.

Abstract: Method and system for defect detection in manufacturing integrated circuits. In an embodiment, the invention provides a method for identifying one or more sources for possible causing manufacturing detects in integrated circuits. The method includes a step for providing a plurality of semiconductor substrates. The method includes a step for processing the plurality of semiconductor substrates in a plurality of processing steps using a plurality of processing tools. The method additionally includes a step for providing a database, which includes data associated with the processing of the plurality of semiconductor substrates. The method further includes a step for testing the plurality of semiconductor wafers after the processing of the plurality of semiconductor substrates. Additionally, the method includes a step for detecting at least one defect characteristic associated with the plurality of the semiconductor substrates that have been processed.

Abstract: Method and system for defect detection in manufacturing integrated circuits. In an embodiment, the invention provides a method for identifying one or more sources for possible causing manufacturing detects in integrated circuits. The method includes a step for providing a plurality of semiconductor substrates. The method includes a step for processing the plurality of semiconductor substrates in a plurality of processing steps using a plurality of processing tools. The method additionally includes a step for providing a database, which includes data associated with the processing of the plurality of semiconductor substrates. The method further includes a step for testing the plurality of semiconductor wafers after the processing of the plurality of semiconductor substrates. Additionally, the method includes a step for detecting at least one defect characteristic associated with the plurality of the semiconductor substrates that have been processed.