Abstract: Methods and apparatus to clamp overvoltages for inductive power transfer systems are described herein. An example overvoltage protection circuit is described, including a first terminal configured to receive an alternating current signal for conversion to a second signal, a capacitor, a first switch configured to selectively electrically couple the capacitor to the first terminal based on an overvoltage detection signal to reduce an overvoltage on the second signal, and an overvoltage detector. The example overvoltage detector is configured to determine a signal level of the second signal and, in response to determining that the signal level of the second signal is greater than a threshold, to output the overvoltage detection signal to cause the switch to electrically couple the capacitor between the first terminal and a second terminal.

Abstract: Methods and apparatus to clamp overvoltages for inductive power transfer systems are described herein. An example overvoltage protection circuit is described, including a first terminal configured to receive an alternating current signal for conversion to a second signal, a capacitor, a first switch configured to selectively electrically couple the capacitor to the first terminal based on an overvoltage detection signal to reduce an overvoltage on the second signal, and an overvoltage detector. The example overvoltage detector is configured to determine a signal level of the second signal and, in response to determining that the signal level of the second signal is greater than a threshold, to output the overvoltage detection signal to cause the switch to electrically couple the capacitor between the first terminal and a second terminal.

Abstract: Methods and apparatus to clamp overvoltages for inductive power transfer systems are described herein. An example overvoltage protection circuit is described, including a first terminal configured to receive an alternating current signal for conversion to a second signal, a capacitor, a first switch configured to selectively electrically couple the capacitor to the first terminal based on an overvoltage detection signal to reduce an overvoltage on the second signal, and an overvoltage detector. The example overvoltage detector is configured to determine a signal level of the second signal and, in response to determining that the signal level of the second signal is greater than a threshold, to output the overvoltage detection signal to cause the switch to electrically couple the capacitor between the first terminal and a second terminal.

Abstract: Various apparatuses and methods for supplying an electrical current are disclosed herein. For example, some embodiments provide an apparatus including a current regulation switch connected in a current path between a power input and a current output. A current regulator is connected to the current regulation switch. The current regulator includes a current set terminal, and the current through the current regulation switch is proportional to the current through current set terminal. An impedance monitor is connected to the current set terminal.

Abstract: A voltage clamping circuit includes a current source having a fixed current source and a variable current source and a variable resistor receiving current from the current source. The variable resistor varies its resistance in response to an environmental operating condition. The voltage clamping circuit also includes an amplifier configured to compare a sensor node voltage with a reference voltage, the sensor node voltage being in communication with the voltage drop across the variable resistor. The amplifier is configured and connected to provide a control output to control the variable current source to modify current output from the variable current source to at least in part prevent the sensor node voltage from exceeding a reference voltage when certain operating conditions are present.

Abstract: Methods and apparatus to clamp overvoltages for inductive power transfer systems are described herein. An example overvoltage protection circuit is described, including a first terminal configured to receive an alternating current signal for conversion to a second signal, a capacitor, a first switch configured to selectively electrically couple the capacitor to the first terminal based on an overvoltage detection signal to reduce an overvoltage on the second signal, and an overvoltage detector. The example overvoltage detector is configured to determine a signal level of the second signal and, in response to determining that the signal level of the second signal is greater than a threshold, to output the overvoltage detection signal to cause the switch to electrically couple the capacitor between the first terminal and a second terminal.

Abstract: A voltage clamping circuit includes a current source having a fixed current source and a variable current source and a variable resistor receiving current from the current source. The variable resistor varies its resistance in response to an environmental operating condition. The voltage clamping circuit also includes an amplifier configured to compare a sensor node voltage with a reference voltage, the sensor node voltage being in communication with the voltage drop across the variable resistor. The amplifier is configured and connected to provide a control output to control the variable current source to modify current output from the variable current source to at least in part prevent the sensor node voltage from exceeding a reference voltage when certain operating conditions are present.

Abstract: A voltage clamping circuit includes a current source having a fixed current source and a variable current source and a variable resistor receiving current from the current source. The variable resistor varies its resistance in response to an environmental operating condition. The voltage clamping circuit also includes an amplifier configured to compare a sensor node voltage with a reference voltage, the sensor node voltage being in communication with the voltage drop across the variable resistor. The amplifier is configured and connected to provide a control output to control the variable current source to modify current output from the variable current source to at least in part prevent the sensor node voltage from exceeding a reference voltage when certain operating conditions are present.

Abstract: A delay applied to a turn-on time for a high side switch in a switch mode power converter prevents oscillation between continuous and discontinuous conduction modes under light load conditions. The delay equalizes turn-on time for a high side switch with respect to continuous and discontinuous modes, so that turn-on time is not treated differently between the different modes. The delay value can be set for be equivalent to a propagation delay through a driver for a low side switch, in addition to a turn-off time for the low side switch. The addition of the delay element tends to maintain the switch mode power converter in a discontinuous mode under light load conditions and avoids oscillation between discontinuous and continuous conduction modes.

Abstract: Various apparatuses and methods for supplying an electrical current are disclosed herein. For example, some embodiments provide an apparatus including a current regulation switch connected in a current path between a power input and a current output. A current regulator is connected to the current regulation switch. The current regulator includes a current set terminal, and the current through the current regulation switch is proportional to the current through current set terminal. An impedance monitor is connected to the current set terminal.

Abstract: A voltage clamping circuit includes a current source having a fixed current source and a variable current source and a variable resistor receiving current from the current source. The variable resistor varies its resistance in response to an environmental operating condition. The voltage clamping circuit also includes an amplifier configured to compare a sensor node voltage with a reference voltage, the sensor node voltage being in communication with the voltage drop across the variable resistor. The amplifier is configured and connected to provide a control output to control the variable current source to modify current output from the variable current source to at least in part prevent the sensor node voltage from exceeding a reference voltage when certain operating conditions are present.

Abstract: A delay applied to a turn-on time for a high side switch in a switch mode power converter prevents oscillation between continuous and discontinuous conduction modes under light load conditions. The delay equalizes turn-on time for a high side switch with respect to continuous and discontinuous modes, so that turn-on time is not treated differently between the different modes. The delay value can be set for be equivalent to a propagation delay through a driver for a low side switch, in addition to a turn-off time for the low side switch. The addition of the delay element tends to maintain the switch mode power converter in a discontinuous mode under light load conditions and avoids oscillation between discontinuous and continuous conduction modes.

Abstract: The UVLO (undervoltage lockout) circuit provides a very low quiescent current that is independent of supply voltage. The circuit includes a low voltage IPTAT (current proportional to absolute temperature) generator coupled to a comparator 24 wherein a first input of the comparator 24 is coupled to the IPTAT generator in a way that forms a bandgap voltage with respect to ground and a second input of the comparator 24 is coupled to the IPTAT generator in a way that forms a bandgap voltage with respect to a supply node. This makes the quiescent current independent of the supply voltage because there is no voltage divider between the supply node and ground.

Abstract: A low drop-out voltage regulator circuit includes: a MOS pass through transistor 12; a resistor feedback circuit 18 and 20 coupled to the MOS pass through transistor 12; an amplifier 16 having an input coupled to the resistor feedback circuit 18 and 20; a Class A output stage 22 coupled between an output of the amplifier 16 and a gate of the MOS pass through transistor 12; and a speedup circuit 48 coupled between the output of the amplifier and the gate of the MOS pass through transistor.

Abstract: The UVLO (undervoltage lockout) circuit provides a very low quiescent current that is independent of supply voltage. The circuit includes a low voltage IPTAT (current proportional to absolute temperature) generator coupled to a comparator 24 wherein a first input of the comparator 24 is coupled to the IPTAT generator in a way that forms a bandgap voltage with respect to ground and a second input of the comparator 24 is coupled to the IPTAT generator in a way that forms a bandgap voltage with respect to a supply node. This makes the quiescent current independent of the supply voltage because there is no voltage divider between the supply node and ground.