Patents by Inventor Paul L. Shaffer

Paul L. Shaffer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4185269
    Abstract: A system is disclosed for generating a plurality of error correcting check ECC bytes from a block of data presented to the system in serial by byte form. The system employs a plurality of ECC channels which operate in parallel with the channels generating check bytes from interleaved subsets of the data block. One channel generates an ECC parity check byte for each interleaved subset while another channel generates an ECC locator check byte for each interleaved subset of data. The ECC locator check byte for each subset represents the parity or modulo 2 sum of bit positions which are selected systematically in accordance with a predefined m sequence which is unique to each channel that generates locator check bytes. Error patterns greater than the number of bits in one byte are correctable, as are error patterns which are less than the number of bits in one byte but extend across byte boundaries of two adjacent bytes in different subsets.
    Type: Grant
    Filed: June 30, 1978
    Date of Patent: January 22, 1980
    Assignee: International Business Machines Corporation
    Inventors: Paul Hodges, Werner J. Schaeuble, Paul L. Shaffer