Abstract: A process and an architecture related to a vertical MOSFET device and a capacitor for use in integrated circuits. Generally, the integrated circuit structure includes a semiconductor layer with a major surface formed along a plane thereof and further including a first doped region formed in the surface. A second doped region of a different conductivity type than the first doped region is positioned over the first region. A third doped region of a different conductivity type than the second region is positioned over the second region. In one embodiment of the invention, a semiconductor device includes a first layer of semiconductor material and a first field-effect transistor having a first source/drain region formed in the first layer. A channel region of the transistor is formed over the first layer and an associated second source/drain region is formed over the channel region. The integrated circuit further includes a capacitor having a bottom plate, dielectric layer and a top capacitor plate.

Abstract: A process and an architecture related to a vertical MOSFET device and a capacitor for use in integrated circuits. Generally, the integrated circuit structure includes a semiconductor layer with a major surface formed along a plane thereof and further including a first doped region formed in the surface. A second doped region of a different conductivity type than the first doped region is positioned over the first region. A third doped region of a different conductivity type than the second region is positioned over the second region. In one embodiment of the invention, a semiconductor device includes a first layer of semiconductor material and a first field-effect transistor having a first source/drain region formed in the first layer. A channel region of the transistor is formed over the first layer and an associated second source/drain region is formed over the channel region. The integrated circuit further includes a capacitor having a bottom plate, dielectric layer and a top capacitor plate.

Abstract: A high pressure chamber comprises a chamber housing, a platen, and a mechanical drive mechanism. The chamber housing comprises a first sealing surface. The platen comprises a region for holding the semiconductor substrate and a second sealing surface. The mechanical drive mechanism couples the platen to the chamber housing. In operation, the mechanical drive mechanism separates the platen from the chamber housing for loading of the semiconductor substrate. In further operation, the mechanical drive mechanism causes the second sealing surface of the platen and the first sealing surface of the chamber housing to form a high pressure processing chamber around the semiconductor substrate.

Abstract: An architecture for creating a vertical silicon-on-insulator MOSFET. Generally, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and a first source/drain contact region formed in the surface. A relatively thin single crystalline layer is oriented vertically above the major surface and comprises a first source/drain doped region over which is located a doped channel region, over which is located a second source/drain region. An insulating layer is disposed adjacent said first and said second source/drain regions and said channel region, serving as the insulating material of the SOI device. In another embodiment, insulating material is adjacent only said first and said second source/drain regions. A conductive region is adjacent the channel region for connecting the back side of the channel region to ground, for example, to prevent the channel region from floating.

Abstract: An interconnect architecture for connecting a plurality of closely-spaced electrical elements on a first integrated circuit fabricated structure with operative circuits on a second integrated circuit fabricated structure. In one embodiment, the first integrated circuit fabricated structure comprises a plurality of photo sensors. Conductive interconnect elements on the first integrated circuit fabricated structure provide electrical connection between individual photo sensors and the operative circuitry on the second integrated circuit fabricated structure.

Abstract: An architecture for creating a vertical JFET. Generally, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and a first source/drain doped region formed in the surface. A second doped region forming a channel of different conductivity type than the first region is positioned over the first region. A third doped region is formed over the second doped region having an opposite conductivity type with respect to the second doped region, and forming a source/drain region. A gate is formed over the channel to form a vertical JFET. In an associated method of manufacturing the semiconductor device, a first source/drain region is formed in a semiconductor layer. A field-effect transistor gate region, including a channel and a gate electrode, is formed over the first source/drain region. A second source/drain region is then formed over the channel having the appropriate conductivity type.

Abstract: An apparatus for supercritical processing and non-supercritical processing of a workpiece comprises a transfer module, a supercritical processing module, a non-supercritical processing module, and a robot. The transfer module includes an entrance. The supercritical processing module and the non-supercritical processing module are coupled to the transfer module. The robot is preferably located within the transfer module. In operation, the robot transfers a workpiece from the entrance of the transfer module to the supercritical processing module. After supercritical processing, the robot then transfers workpiece from the supercritical processing module to the non-supercritical processing module. After the non-supercritical processing, the robot returns the workpiece to the entrance of the transfer module. Alternatively, the non-supercritical processing is performed before the supercritical processing.

Abstract: An apparatus for supercritical processing and non-supercritical processing of a workpiece comprises a transfer module, a supercritical processing module, a non-supercritical processing module, and a robot. The transfer module includes an entrance. The supercritical processing module and the non-supercritical processing module are coupled to the transfer module. The robot is preferably located within the transfer module. In operation, the robot transfers a workpiece from the entrance of the transfer module to the supercritical processing module. After supercritical processing, the robot then transfers workpiece from the supercritical processing module to the non-supercritical processing module. After the non-supercritical processing, the robot returns the workpiece to the entrance of the transfer module. Alternatively, the non-supercritical processing is performed before the supercritical processing.

Abstract: An apparatus for supercritical processing of multiple workpieces comprises a transfer module, first and second supercritical processing modules, and a robot. The transfer module includes an entrance. The first and second supercritical processing modules are coupled to the transfer module. The robot is preferably located with the transfer module. In operation, the robot transfers a first workpiece from the entrance of the transfer module to the first supercritical processing module. The robot then transfers a second workpiece from the entrance to the second supercritical processing module. After the workpieces have been processed, the robot returns the first and second workpieces to the entrance of the transfer module. Alternatively, the apparatus includes additional supercritical processing modules coupled to the transfer module.

Abstract: A thin-film multilayer high-Q inductor having a ferromagnetic core and spanning at least three metal layers is formed by forming a plurality of parallel first metal runners on the semiconductor substrate. A plurality of first and second vertical conductive vias are formed in electrical connection with each end of the plurality of metal runners. A plurality of third and fourth conductive vias are formed over the plurality of first and second conductive vias and a plurality of second metal runners are formed interconnecting the plurality of third and fourth conductive vias. The first metal runners and second metal runners are oriented such that one end of a first metal runner is connected to an overlying end of a second metal runner by way of the first and third vertical conductive vias. The other end of the second metal runner is connected to the next metal one runner by way of the second and fourth vertical conductive vias., forming a continuously conductive structure having a generally helical shape.

Abstract: A high pressure chamber comprises a chamber housing, a platen, and a mechanical drive mechanism. The chamber housing comprises a first sealing surface. The platen comprises a region for holding the semiconductor substrate and a second sealing surface. The mechanical drive mechanism couples the platen to the chamber housing. In operation, the mechanical drive mechanism separates the platen from the chamber housing for loading of the semiconductor substrate. In further operation, the mechanical drive mechanism causes the second sealing surface of the platen and the first sealing surface of the chamber housing to form a high pressure processing chamber around the semiconductor substrate.

Abstract: An architecture for creating multiple operating voltage MOSFETs. Generally, an integrated circuit structure includes a semiconductor area with a major surface formed along a plane and first and second spaced-apart doped regions formed in the surface. A third doped region forming a channel of different conductivity type than the first region is positioned over the first region. A fourth doped region of a different conductivity and forming a channel is positioned over the second region. The process of creating the gate structure for each of the two transistors allows for the formation of oxide layers of different thickness between the two transistors. The transistors are therefore capable of operating at different operating voltages (including different threshold voltages). Each transistor further includes fifth and sixth layers positioned respectively over the third and fourth regions and having an opposite conductivity type with respect to the third and fourth regions.

Abstract: An apparatus for supercritical processing of multiple workpieces comprises a transfer module, first and second supercritical processing modules, and a robot. The transfer module includes an entrance. The first and second supercritical processing modules are coupled to the transfer module. The robot is preferably located with the transfer module. In operation, the robot transfers a first workpiece from the entrance of the transfer module to the first supercritical processing module. The robot then transfers a second workpiece from the entrance to the second supercritical processing module. After the workpieces have been processed, the robot returns the first and second workpieces to the entrance of the transfer module. Alternatively, the apparatus includes additional supercritical processing modules coupled to the transfer module.

Abstract: An apparatus for supercritical processing of multiple workpieces comprises a transfer module, first and second supercritical processing modules, and a robot. The transfer module includes an entrance. The first and second supercritical processing modules are coupled to the transfer module. The robot is preferably located with the transfer module. In operation, the robot transfers a first workpiece from the entrance of the transfer module to the first supercritical processing module. The robot then transfers a second workpiece from the entrance to the second supercritical processing module. After the workpieces have been processed, the robot returns the first and second workpieces to the entrance of the transfer module. Alternatively, the apparatus includes additional supercritical processing modules coupled to the transfer module.

Abstract: A high pressure processing chamber for processing multiple semiconductor substrates comprises a chamber housing, a cassette, and a chamber closure. The cassette is removably coupled to the chamber housing. The cassette is configured to accommodate at least two semiconductor substrates. The chamber closure is coupled to the chamber housing. The chamber closure is configured such that in operation the chamber closure seals with the chamber housing to provide an enclosure for high pressure processing of the semiconductor substrates.

Abstract: An apparatus for supercritical processing and non-supercritical processing of a workpiece comprises a transfer module, a supercritical processing module, a non-supercritical processing module, and a robot. The transfer module includes an entrance. The supercritical processing module and the non-supercritical processing module are coupled to the transfer module. The robot is preferably located within the transfer module. In operation, the robot transfers a workpiece from the entrance of the transfer module to the supercritical processing module. After supercritical processing, the robot then transfers workpiece from the supercritical processing module to the non-supercritical processing module. After the non-supercritical processing, the robot returns the workpiece to the entrance of the transfer module. Alternatively, the non-supercritical processing is performed before the supercritical processing.

Abstract: An apparatus for supercritical processing and non-supercritical processing of a workpiece comprises a transfer module, a supercritical processing module, a non-supercritical processing module, and a robot. The transfer module includes an entrance. The supercritical processing module and the non-supercritical processing module are coupled to the transfer module. The robot is preferably located within the transfer module. In operation, the robot transfers a workpiece from the entrance of the transfer module to the supercritical processing module. After supercritical processing, the robot then transfers workpiece from the supercritical processing module to the non-supercritical processing module. After the non-supercritical processing, the robot returns the workpiece to the entrance of the transfer module. Alternatively, the non-supercritical processing is performed before the supercritical processing.

Abstract: An apparatus for supercritical processing of multiple workpieces comprises a transfer module, first and second supercritical processing modules, and a robot. The transfer module includes an entrance. The first and second supercritical processing modules are coupled to the transfer module. The robot is preferably located with the transfer module. In operation, the robot transfers a first workpiece from the entrance of the transfer module to the first supercritical processing module. The robot then transfers a second workpiece from the entrance to the second supercritical processing module. After the workpieces have been processed, the robot returns the first and second workpieces to the entrance of the transfer module. Alternatively, the apparatus includes additional supercritical processing modules coupled to the transfer module.

Abstract: An apparatus for supercritical processing of multiple workpieces comprises a transfer module, first and second supercritical processing modules, and a robot. The transfer module includes an entrance. The first and second supercritical processing modules are coupled to the transfer module. The robot is preferably located with the transfer module. In operation, the robot transfers a first workpiece from the entrance of the transfer module to the first supercritical processing module. The robot then transfers a second workpiece from the entrance to the second supercritical processing module. After the workpieces have been processed, the robot returns the first and second workpieces to the entrance of the transfer module. Alternatively, the apparatus includes additional supercritical processing modules coupled to the transfer module.

Abstract: A high pressure chamber comprises a chamber housing, a platen, and a mechanical drive mechanism. The chamber housing comprises a first sealing surface. The platen comprises a region for holding the semiconductor substrate and a second sealing surface. The mechanical drive mechanism couples the platen to the chamber housing. In operation, the mechanical drive mechanism separates the platen from the chamber housing for loading of the semiconductor substrate. In further operation, the mechanical drive mechanism causes the second sealing surface of the platen and the first sealing surface of the chamber housing to form a high pressure processing chamber around the semiconductor substrate.