Abstract: A radio frequency (RF) transmitter includes a digital radio processor and a baseband processor. A complex analog-to-digital converter (ADC) within the radio processor provides an analog interface to the baseband processor to receive an analog complex modulated baseband signal and convert the analog complex modulated baseband signal to a digital complex modulated baseband signal. A demodulator within the radio processor demodulates the digital complex modulated baseband signal to recreate the original transmit digital data as a demodulated digital signal. The demodulated digital signal is processed by a digital processor in the radio processor to mitigate the effects of various imperfections in the radio processor circuitry.

Abstract: Methods and systems for processing an RF signal are disclosed herein. Aspects of the method may comprise utilizing a single input CORDIC and a single output CORDIC for synchronizing and demodulating a received signal, wherein the received signal may comprise one or more bit rates. The received signal may comprise a one megabit per second (Mbps) signal. The single input CORDIC may be configured to operate in a rotating mode and the single output CORDIC may be configured to operate in a rotating mode and/or an arctangent (ARCTAN) mode. A rotated output of the single input CORDIC may be correlated with a phase shift keying (PSK) synchronization (sync) word and a portion of the correlated rotated output of the single input CORDIC may be buffered.

Abstract: Aspects of a method and system for selective equalization enablement based on modulation type may be found in a method for processing a radio frequency (RF) signal that comprises receiving a Bluetooth signal via an RF channel, detecting a modulation type of the received Bluetooth signal, and selecting an equalization circuit for processing the received Bluetooth signal based on the detected modulation type. The method may also comprise determining a data rate based on the detected modulation type.

Abstract: An analog-to-digital converter (ADC) disposed in a data reception path to convert data from an analog format to a digital format is switched between two or more power modes to conserve power when data is not being received. ADC stays in a lower power-lower precision mode until an inbound data is detected, at which time the ADC switches to a higher power-higher precision mode to convert the data. Once data conversion is completed, the ADC switches back to the lower power-lower precision mode to conserve power.