Patents by Inventor Paul M. Furnanz

Paul M. Furnanz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Transparent hierarchical routing in an integrated circuit design
    Patent number: 10817639
    Abstract: Systems and techniques are described for transparent hierarchical routing in an integrated circuit (IC) design. A logical netlist can be analyzed in the IC design to identify endpoints of a physical route that crosses at least one physical hierarchy boundary. Next, a set of routing shapes can be created to electrically connect the endpoints of the physical route. The set of routing shapes can then be transformed to corresponding routing shapes in each physical hierarchy context along the physical route.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: October 27, 2020
    Assignee: Synopsys, Inc.
    Inventors: Karlo Tskitishvili, Jeffrey J. Loescher, Luis D. Guilin, Paul M. Furnanz
  • Graphical user interface to facilitate routing of a physical connection in a hierarchical integrated circuit design
    Patent number: 10346575
    Abstract: Systems and techniques are described for transparently editing physical data in hierarchical IC designs. Some embodiments allow a user to access objects at any level of the physical hierarchy and to specify a particular editing operation (move, rotate, delete, cut, split, etc.) relative to the top-level block. The embodiments can automatically transform and apply the editing operations in the context of the block where the edited object resides. Systems and techniques for automatic context selection, logical connection analysis, cross hierarchical routing, transparent hierarchical routing, and maintaining physical connectivity across hierarchy boundaries are also described.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: July 9, 2019
    Assignee: Synopsys, Inc.
    Inventors: Karlo Tskitishvili, Jeffrey J. Loescher, Luis D. Guilin, Paul M. Furnanz
  • GRAPHICAL USER INTERFACE TO FACILITATE ROUTING OF A PHYSICAL CONNECTION IN A HIERARCHICAL INTEGRATED CIRCUIT DESIGN
    Publication number: 20180150587
    Abstract: Systems and techniques are described for transparently editing physical data in hierarchical IC designs. Some embodiments allow a user to access objects at any level of the physical hierarchy and to specify a particular editing operation (move, rotate, delete, cut, split, etc.) relative to the top-level block. The embodiments can automatically transform and apply the editing operations in the context of the block where the edited object resides. Systems and techniques for automatic context selection, logical connection analysis, cross hierarchical routing, transparent hierarchical routing, and maintaining physical connectivity across hierarchy boundaries are also described.
    Type: Application
    Filed: January 23, 2018
    Publication date: May 31, 2018
    Applicant: Synopsys, Inc.
    Inventors: Karlo Tskitishvili, Jeffrey J. Loescher, Luis D. Guilin, Paul M. Furnanz
  • Transparent editing of physical data in hierarchical integrated circuit design
    Patent number: 9898570
    Abstract: Systems and techniques are described for transparently editing physical data in hierarchical IC designs. Some embodiments allow a user to access objects at any level of the physical hierarchy and to specify a particular editing operation (move, rotate, delete, cut, split, etc.) relative to the top-level block. The embodiments can automatically transform and apply the editing operations in the context of the block where the edited object resides. Systems and techniques for automatic context selection, logical connection analysis, cross hierarchical routing, transparent hierarchical routing, and maintaining physical connectivity across hierarchy boundaries are also described.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: February 20, 2018
    Assignee: Synopsys, Inc.
    Inventors: Karlo Tskitishvili, Jeffrey J. Loescher, Luis D. Guilin, Paul M. Furnanz
  • TRANSPARENT EDITING OF PHYSICAL DATA IN HIERARCHICAL INTEGRATED CIRCUIT DESIGN
    Publication number: 20160275228
    Abstract: Systems and techniques are described for transparently editing physical data in hierarchical IC designs. Some embodiments allow a user to access objects at any level of the physical hierarchy and to specify a particular editing operation (move, rotate, delete, cut, split, etc.) relative to the top-level block. The embodiments can automatically transform and apply the editing operations in the context of the block where the edited object resides. Systems and techniques for automatic context selection, logical connection analysis, cross hierarchical routing, transparent hierarchical routing, and maintaining physical connectivity across hierarchy boundaries are also described.
    Type: Application
    Filed: March 21, 2016
    Publication date: September 22, 2016
    Applicant: Synopsys, Inc.
    Inventors: Karlo Tskitishvili, Jeffrey J. Loescher, Luis D. Guilin, Paul M. Furnanz