Patents by Inventor Paul M. Julich

Paul M. Julich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5794172
    Abstract: A scheduling system and method for moving plural objects through a multipath system described as a freight railway scheduling system. The achievable movement plan can be used to assist in the control of, or to automatically control, the movement of trains through the system.
    Type: Grant
    Filed: January 23, 1997
    Date of Patent: August 11, 1998
    Assignee: Harris Corporation
    Inventors: William L. Matheson, Paul M. Julich, Michael S. Crone, Douglas A. Thomae, Thu V. Vu, M. Scott Wills
  • Patent number: 5623413
    Abstract: A scheduling system and method for moving plural objects through a multipath system described as a freight railway scheduling system. The achievable movement plan can be used to assist in the control of, or to automatically control, the movement of trains through the system.
    Type: Grant
    Filed: September 1, 1994
    Date of Patent: April 22, 1997
    Assignee: Harris Corporation
    Inventors: William L. Matheson, Paul M. Julich, Michael S. Crone, Douglas A. Thomae, Thu V. Vu, M. Scott Wills
  • Patent number: 4634110
    Abstract: A fault detection and redundancy management system for a dual redundancy based network architecture in which the principal control components (master units) are configured and programmed to repetitively carry out intra- and inter-unit performance tests as an a priori requirement for network command capability. These performance tests are carried out in a prescribed sequence to define the fault detection and reconfiguration procedure. The procedure is designed to preclude the cascading of faults. As a first step in this procedure, each processor in a master unit performs a thorough self-test of its own functional capability. Secondly, if a processor has determined that it has passed all of these internal procedures, it must then successfully inform a designated "chief" processor via an interprocessor handshake. This interprocessor handshake is effected by causing each processor in the master unit to set a flag in a shared memory during a prescribed time interval.
    Type: Grant
    Filed: July 28, 1983
    Date of Patent: January 6, 1987
    Assignee: Harris Corporation
    Inventors: Paul M. Julich, Jeffrey B. Pearce