Abstract: A real-time software receiver that executes on a general purpose processor. The software receiver includes data acquisition and correlator modules that perform, in place of hardware correlation, baseband mixing and PRN code correlation using bit-wise parallelism.

Abstract: A real-time software receiver that executes on a general purpose processor. The software receiver includes data acquisition and correlator modules that perform, in place of hardware correlation, baseband mixing and PRN code correlation using bit-wise parallelism.

Abstract: A real-time software receiver that executes on a general purpose processor. The software receiver includes data acquisition and correlator modules that perform, in place of hardware correlation, baseband mixing and PRN code correlation using bit-wise parallelism.

Abstract: When a weigh feeding system which senses the rate of material feed by weighing the material and automatically controls the actual feed on the basis of a departure of the sensed rate of material feed from a desired rate, thereby to produce an error signal, is subjected to a major or sporadic disturbance such that the sensed rate departs from the desired feed rate by more than a predetermined amount, the system limits the feed rate used to produce the error signal to a synthetic amount no matter by how far the sensed feed rate departs from the desired rate, the values of said predetermined amount and said synthetic amount being selected in accordance with the nature of the system, the degree of accuracy desired, and the nature of the expected disturbances, thereby to improve the overall accuracy of the system when subjected to such disturbances.

Abstract: A programmable controller that is programmed to simulate a ladder diagram and accepts input signals to control output devices in accordance with the ladder diagram program and comprising, in addition to a main memory that stores the program, a logic processor and input/output circuits, of a special wire number memory and a control coil memory for receiving, storing and making available to the processor the result of every logic function representing the current on-off status of each wire node and each control coil and associated contacts. This controller affords the maintenance of a complete current record of the changing status of the contacts and their interconnecting circuit nodes. This makes possible a particularly simple unidirectional-logic programming mode because the programmer does not have to keep track of which logic operations must be temporarily stored.

Abstract: A portable programmer panel incorporating switches, logic circuits and data indicators for storing a wire number program of a ladder diagram in a memory. A memory board is plugged into the panel. Selected sets of switches corresponding to fields F1, F2 and F3 are repeatedly set on a decimal basis for three successive instruction words (data) to be multiplexed into memory locations, respectively indicative of the input wire number (F1), the contact number (F2), and the output wire number (F3) for a series contact or the last parallel contact; or the input wire number (F1) and the control coil or other output device number (F3) for an output function; or the input wire number (F1) and the contact number (F2) for a parallel contact other than the last. Simultaneously, a switch in the F2 field is set to program the normally-open (N.O.) or normally-closed (N.C.) nature of the contact.

Abstract: A ladder static logic control system having static logic circuits that are logic equivalents of the electromagnetic, mechanical and other circuit components in a prior electromechanical ladder diagram. Ladder static logic circuits that are logic equivalents of electromagnetic devices such as control coils, latching coils and timer coils and having a built-in operating time delay to eliminate any logic race problems. A method of making the above ladder static logic control system by starting with a ladder diagram of a prior art electro-mechanical control system and substituting a ladder static logic circuit for each of the electro-mechanical component counterparts appearing therein.