Patents by Inventor Paul Mazur

Paul Mazur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10543907
    Abstract: A multilayered active surface is presented whose rugosity can be controlled by an applied electrical field. Varying the applied electrical field can control the rugosity of the surface which makes contact with a fluid, and thereby can affect instabilities of the boundary layer. A middle layer of the multilayered active surface can be made of a compliant electroactive material. In some cases, a pre-stretch in the middle layer can predefine a rugosity of the multilayered active surface without an applied electrical field, in which case an applied electrical field can further alter the rugosity in both amplitude and spatial periodicity and ultimately result to a smooth surface for a higher value of the applied electrical field. A top layer and a bottom layer are constructed using conductive material and uses as electrodes coupled to a voltage source to generate the electric field that controls the rugosity of the surface.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: January 28, 2020
    Assignee: CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Paul Mazur, Kaushik Bhattacharya, Beverley McKeon
  • Publication number: 20170008615
    Abstract: A multilayered active surface is presented whose rugosity can be controlled by an applied electrical field. Varying the applied electrical field can control the rugosity of the surface which makes contact with a fluid, and thereby can affect instabilities of the boundary layer. A middle layer of the multilayered active surface can be made of a compliant electroactive material. In some cases, a pre-stretch in the middle layer can predefine a rugosity of the multilayered active surface without an applied electrical field, in which case an applied electrical field can further alter the rugosity in both amplitude and spatial periodicity and ultimately result to a smooth surface for a higher value of the applied electrical field. A top layer and a bottom layer are constructed using conductive material and uses as electrodes coupled to a voltage source to generate the electric field that controls the rugosity of the surface.
    Type: Application
    Filed: July 5, 2016
    Publication date: January 12, 2017
    Inventors: Paul MAZUR, Kaushik BHATTACHARYA, Beverley MCKEON
  • Patent number: 8873188
    Abstract: A hard disk drive or other storage device comprises a storage medium, a write head configured to write data to the storage medium, and control circuitry coupled to the write head. The control circuitry comprises degauss circuitry coupled to or otherwise associated with one or more write drivers. The degauss circuitry is configured to generate an asymmetric degauss signal to be applied to the write head. The asymmetric degauss signal has a waveform with upper and lower decay envelopes that are asymmetric about a specified degauss current level, such as a substantially zero current level.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: October 28, 2014
    Assignee: LSI Corporation
    Inventors: Boris Livshitz, Paul Mazur, Anamul Hoque, Jason S. Goldberg
  • Patent number: 8792197
    Abstract: A hard disk drive or other storage device comprises a storage medium, a write head, and control circuitry coupled to the write head. The control circuitry comprises a write driver configured to generate a write signal comprising write pulses responsive to write data, and a driver controller configured to adjust overshoot amplitudes of respective ones of the write pulses utilizing a segmented digital-to-analog converter. The overshoot amplitudes are adjusted by detecting patterns in the write data, decoding a first portion of a base overshoot value to identify a corresponding number of base overshoot segments, combining the base overshoot value and a differential overshoot value, decoding a first portion of the combined base overshoot and differential overshoot values to identify a corresponding number of enhanced overshoot segments, and selecting between the number of base overshoot segments and the number of enhanced overshoot segments responsive to detection of a particular pattern.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: July 29, 2014
    Assignee: LSI Corporation
    Inventors: Ross S. Wilson, Jason P. Brenden, Paul Mazur, Cameron C. Rabe, Gang Chen
  • Patent number: 8773817
    Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a chirped degauss signal to be applied to the write head by the write driver. The degauss circuitry comprises a ramp generator configured to generate a ramp signal for controlling a frequency of at least a portion of a waveform of the chirped degauss signal. The ramp signal generated by the ramp generator may comprise a current ramp that is applied to a control input of a current controlled oscillator of the degauss circuitry.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: July 8, 2014
    Assignee: LSI Corporation
    Inventors: Paul Mazur, Robert A. Norman, Jeffrey A. Gleason, Anamul Hoque
  • Patent number: 8737006
    Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a degauss signal to be applied to the write head by the write driver. The degauss signal has a waveform comprising a plurality of decay segments including at least one alternating current decay segment and at least one direct current decay segment. An initial decay segment of the plurality of decay segments may comprise an alternating current decay segment or a direct current decay segment, and may be immediately followed by a decay segment of the opposite type.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: May 27, 2014
    Assignee: LSI Corporation
    Inventors: Boris Livshitz, Paul Mazur, Anamul Hoque
  • Patent number: 8699161
    Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a read/write head configured to read data from and write data to the disk, and control circuitry coupled to or otherwise associated with the read/write head. The control circuitry comprises a write driver configured to generate a write signal for data to be written to the storage disk, and a multiple-slope transition controller associated with the write driver and configured to control a data transition in the write signal such that the data transition comprises at least two different segments each having a different slope, with the transition controller comprising separate slope control mechanisms for each of the segments. By way of example, the data transition may comprise a dual-slope transition having first and second segments arranged sequentially between a start point and an end point of the data transition.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 15, 2014
    Assignee: LSI Corporation
    Inventors: Boris Livshitz, Jeffrey A. Gleason, Jason S. Goldberg, Paul Mazur, Cameron C. Rabe
  • Publication number: 20140071561
    Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a degauss signal to be applied to the write head by the write driver. The degauss signal has a waveform comprising a plurality of decay segments including at least one alternating current decay segment and at least one direct current decay segment. An initial decay segment of the plurality of decay segments may comprise an alternating current decay segment or a direct current decay segment, and may be immediately followed by a decay segment of the opposite type.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 13, 2014
    Applicant: LSI Corporation
    Inventors: Boris Livshitz, Paul Mazur, Anamul Hoque
  • Publication number: 20140029138
    Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a write head configured to write data to the disk, and control circuitry coupled to the write head. The control circuitry comprises a write driver and degauss circuitry associated with the write driver. The degauss circuitry is configured to generate a chirped degauss signal to be applied to the write head by the write driver. The degauss circuitry comprises a ramp generator configured to generate a ramp signal for controlling a frequency of at least a portion of a waveform of the chirped degauss signal. The ramp signal generated by the ramp generator may comprise a current ramp that is applied to a control input of a current controlled oscillator of the degauss circuitry.
    Type: Application
    Filed: July 24, 2012
    Publication date: January 30, 2014
    Applicant: LSI Corporation
    Inventors: Paul Mazur, Robert A. Norman, Jeffrey A. Gleason, Anamul Hoque
  • Publication number: 20130235485
    Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a read/write head configured to read data from and write data to the disk, and control circuitry coupled to or otherwise associated with the read/write head. The control circuitry comprises a write driver configured to generate a write signal for data to be written to the storage disk, and a multiple-slope transition controller associated with the write driver and configured to control a data transition in the write signal such that the data transition comprises at least two different segments each having a different slope, with the transition controller comprising separate slope control mechanisms for each of the segments. By way of example, the data transition may comprise a dual-slope transition having first and second segments arranged sequentially between a start point and an end point of the data transition.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 12, 2013
    Applicant: LSI Corporation
    Inventors: Boris Livshitz, Jeffrey A. Gleason, Jason S. Goldberg, Paul Mazur, Cameron C. Rabe
  • Patent number: 7990219
    Abstract: A voltage regulator, a method of regulating voltage and an IC including a voltage regulator. In one embodiment, the voltage regulator includes: (1) a DC precision amplifier configured to generate a DC precision signal based on a reference voltage and a regulated output of the voltage regulator and (2) a response amplifier, coupled in parallel with the DC precision amplifier, configured to generate an error signal based on the reference voltage and the regulated output, the response amplifier further configured to generate the regulated output based on a regulating signal comprised of the error signal and the DC precision signal. The DC precision amplifier may be a CMOS amplifier and the response amplifier may be a NPN amplifier.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: August 2, 2011
    Assignee: Agere Systems Inc.
    Inventors: Jeffrey A. Gleason, David W. Kelly, Paul Mazur
  • Publication number: 20100090667
    Abstract: A voltage regulator, a method of regulating voltage and an IC including a voltage regulator. In one embodiment, the voltage regulator includes: (1) a DC precision amplifier configured to generate a DC precision signal based on a reference voltage and a regulated output of the voltage regulator and (2) a response amplifier, coupled in parallel with the DC precision amplifier, configured to generate an error signal based on the reference voltage and the regulated output, the response amplifier further configured to generate the regulated output based on a regulating signal comprised of the error signal and the DC precision signal. The DC precision amplifier may be a CMOS amplifier and the response amplifier may be a NPN amplifier.
    Type: Application
    Filed: October 13, 2008
    Publication date: April 15, 2010
    Applicant: Agere Systems Inc.
    Inventors: Jeffrey A. Gleason, David W. Kelly, Paul Mazur